diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2022-05-19 13:55:43 +0200 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-05-19 13:55:43 +0200 |
commit | 764fdbaba337e3b58f31ce7b177c4e7c0ba2088d (patch) | |
tree | 954b7c40be6beb5ab6ca9158840e93873cc43427 /arch/arm/dts | |
parent | 28889ccbfe785c59bfaa7c39985c376b697e2331 (diff) | |
parent | 747146a3eb186fb7101f1aaab53d9188dc41bfbb (diff) | |
download | barebox-764fdbaba337e3b58f31ce7b177c4e7c0ba2088d.tar.gz barebox-764fdbaba337e3b58f31ce7b177c4e7c0ba2088d.tar.xz |
Merge branch 'for-next/misc'
Diffstat (limited to 'arch/arm/dts')
-rw-r--r-- | arch/arm/dts/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/dts/am335x-myirtech-myd.dts | 47 | ||||
-rw-r--r-- | arch/arm/dts/rk3568-bpi-r2-pro.dts | 7 | ||||
-rw-r--r-- | arch/arm/dts/rk3568-evb1-v10.dts | 14 | ||||
-rw-r--r-- | arch/arm/dts/rk3568.dtsi | 82 |
5 files changed, 83 insertions, 68 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index e0177d84e4..46e5e67672 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -40,6 +40,7 @@ lwl-$(CONFIG_MACH_MARVELL_ARMADA_XP_GP) += armada-xp-gp-bb.dtb.o lwl-$(CONFIG_MACH_MARVELL_ARMADA_XP_DB) += armada-xp-db-bb.dtb.o lwl-$(CONFIG_MACH_MB7707) += module-mb7707.dtb.o lwl-$(CONFIG_MACH_MX28EVK) += imx28-evk.dtb.o +lwl-$(CONFIG_MACH_MYIRTECH_X335X) += am335x-myirtech-myd.dtb.o lwl-$(CONFIG_MACH_NETGEAR_RN104) += armada-370-rn104-bb.dtb.o lwl-$(CONFIG_MACH_NETGEAR_RN2120) += armada-xp-rn2120-bb.dtb.o lwl-$(CONFIG_MACH_NITROGEN6) += imx6q-nitrogen6x.dtb.o imx6dl-nitrogen6x.dtb.o imx6qp-nitrogen6_max.dtb.o diff --git a/arch/arm/dts/am335x-myirtech-myd.dts b/arch/arm/dts/am335x-myirtech-myd.dts new file mode 100644 index 0000000000..6ec65e533d --- /dev/null +++ b/arch/arm/dts/am335x-myirtech-myd.dts @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* SPDX-FileCopyrightText: Alexander Shiyan, <shc_work@mail.ru> */ + +/dts-v1/; + +#include <arm/am335x-myirtech-myd.dts> + +/ { + chosen { + environment { + compatible = "barebox,environment"; + device-path = &nand_environment; + }; + }; + +}; + +&nand0 { + /delete-node/ partition@0; + /delete-node/ partition@20000; + + nand_parts: partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "MLO"; + reg = <0x00000 0x20000>; + }; + + partition@80000 { + label = "boot"; + reg = <0x80000 0x100000>; + }; + + nand_environment: partition@180000 { + label = "env"; + reg = <0x180000 0x40000>; + }; + + partition@1c0000 { + label = "system"; + reg = <0x1c0000 0>; + }; + }; +}; diff --git a/arch/arm/dts/rk3568-bpi-r2-pro.dts b/arch/arm/dts/rk3568-bpi-r2-pro.dts index db13f00cd0..da76ab64c1 100644 --- a/arch/arm/dts/rk3568-bpi-r2-pro.dts +++ b/arch/arm/dts/rk3568-bpi-r2-pro.dts @@ -560,16 +560,13 @@ status = "okay"; }; -&usbdrd_dwc3 { +&usb_host0_xhci { dr_mode = "host"; extcon = <&usb2phy0>; -}; - -&usbdrd30 { status = "okay"; }; -&usbhost30 { +&usb_host1_xhci { status = "okay"; }; diff --git a/arch/arm/dts/rk3568-evb1-v10.dts b/arch/arm/dts/rk3568-evb1-v10.dts index 4ded9b1735..df5633978d 100644 --- a/arch/arm/dts/rk3568-evb1-v10.dts +++ b/arch/arm/dts/rk3568-evb1-v10.dts @@ -547,24 +547,20 @@ status = "okay"; }; -&usb_host1_ehci { +&usb_host0_xhci { + extcon = <&usb2phy0>; status = "okay"; }; -&usb_host1_ohci { +&usb_host1_ehci { status = "okay"; }; -&usbdrd_dwc3 { - dr_mode = "otg"; - extcon = <&usb2phy0>; -}; - -&usbdrd30 { +&usb_host1_ohci { status = "okay"; }; -&usbhost30 { +&usb_host1_xhci { status = "okay"; }; diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi index 0f19d3f0c0..3c458754af 100644 --- a/arch/arm/dts/rk3568.dtsi +++ b/arch/arm/dts/rk3568.dtsi @@ -198,62 +198,38 @@ }; }; - usbdrd30: usbdrd { - compatible = "rockchip,rk3568-dwc3", "rockchip,rk3399-dwc3"; + usb_host0_xhci: usb@fcc00000 { + compatible = "rockchip,rk3568-dwc3", "snps,dwc3"; + reg = <0x0 0xfcc00000 0x0 0x400000>; + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru CLK_USB3OTG0_REF>, <&cru CLK_USB3OTG0_SUSPEND>, - <&cru ACLK_USB3OTG0>, <&cru PCLK_PIPE>; + <&cru ACLK_USB3OTG0>; clock-names = "ref_clk", "suspend_clk", - "bus_clk", "pipe_clk"; - #address-cells = <2>; - #size-cells = <2>; - ranges; + "bus_clk"; + dr_mode = "otg"; + phys = <&u2phy0_otg>, <&combphy0_us PHY_TYPE_USB3>; + phy-names = "usb2-phy", "usb3-phy"; + phy_type = "utmi_wide"; + resets = <&cru SRST_USB3OTG0>; + snps,dis_u2_susphy_quirk; status = "disabled"; - - usbdrd_dwc3: dwc3@fcc00000 { - compatible = "snps,dwc3"; - reg = <0x0 0xfcc00000 0x0 0x400000>; - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; - dr_mode = "otg"; - phys = <&u2phy0_otg>, <&combphy0_us PHY_TYPE_USB3>; - phy-names = "usb2-phy", "usb3-phy"; - phy_type = "utmi_wide"; - resets = <&cru SRST_USB3OTG0>; - reset-names = "usb3-otg"; - snps,dis_enblslpm_quirk; - snps,dis-u2-freeclk-exists-quirk; - snps,dis-del-phy-power-chg-quirk; - snps,dis-tx-ipgap-linecheck-quirk; - snps,xhci-trb-ent-quirk; - }; }; - usbhost30: usbhost { - compatible = "rockchip,rk3568-dwc3", "rockchip,rk3399-dwc3"; + usb_host1_xhci: usb@fd000000 { + compatible = "rockchip,rk3568-dwc3", "snps,dwc3"; + reg = <0x0 0xfd000000 0x0 0x400000>; + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru CLK_USB3OTG1_REF>, <&cru CLK_USB3OTG1_SUSPEND>, - <&cru ACLK_USB3OTG1>, <&cru PCLK_PIPE>; + <&cru ACLK_USB3OTG1>; clock-names = "ref_clk", "suspend_clk", - "bus_clk", "pipe_clk"; - #address-cells = <2>; - #size-cells = <2>; - ranges; + "bus_clk"; + dr_mode = "host"; + phys = <&u2phy0_host>, <&combphy1_usq PHY_TYPE_USB3>; + phy-names = "usb2-phy", "usb3-phy"; + phy_type = "utmi_wide"; + resets = <&cru SRST_USB3OTG1>; + snps,dis_u2_susphy_quirk; status = "disabled"; - - usbhost_dwc3: dwc3@fd000000 { - compatible = "snps,dwc3"; - reg = <0x0 0xfd000000 0x0 0x400000>; - interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; - dr_mode = "host"; - phys = <&u2phy0_host>, <&combphy1_usq PHY_TYPE_USB3>; - phy-names = "usb2-phy", "usb3-phy"; - phy_type = "utmi_wide"; - resets = <&cru SRST_USB3OTG1>; - reset-names = "usb3-host"; - snps,dis_enblslpm_quirk; - snps,dis-u2-freeclk-exists-quirk; - snps,dis-del-phy-power-chg-quirk; - snps,dis-tx-ipgap-linecheck-quirk; - snps,xhci-trb-ent-quirk; - }; }; gic: interrupt-controller@fd400000 { @@ -367,11 +343,10 @@ #phy-cells = <1>; clocks = <&pmucru CLK_PCIEPHY0_REF>, <&cru PCLK_PIPEPHY0>, <&cru PCLK_PIPE>; - clock-names = "refclk", "apbclk", "pipe_clk"; + clock-names = "ref", "apb", "pipe"; assigned-clocks = <&pmucru CLK_PCIEPHY0_REF>; assigned-clock-rates = <24000000>; - resets = <&cru SRST_P_PIPEPHY0>, <&cru SRST_PIPEPHY0>; - reset-names = "combphy-apb", "combphy"; + resets = <&cru SRST_PIPEPHY0>; rockchip,pipe-grf = <&pipegrf>; rockchip,pipe-phy-grf = <&pipe_phy_grf0>; status = "disabled"; @@ -383,11 +358,10 @@ #phy-cells = <1>; clocks = <&pmucru CLK_PCIEPHY1_REF>, <&cru PCLK_PIPEPHY1>, <&cru PCLK_PIPE>; - clock-names = "refclk", "apbclk", "pipe_clk"; + clock-names = "ref", "apb", "pipe"; assigned-clocks = <&pmucru CLK_PCIEPHY1_REF>; assigned-clock-rates = <24000000>; - resets = <&cru SRST_P_PIPEPHY1>, <&cru SRST_PIPEPHY1>; - reset-names = "combphy-apb", "combphy"; + resets = <&cru SRST_PIPEPHY1>; rockchip,pipe-grf = <&pipegrf>; rockchip,pipe-phy-grf = <&pipe_phy_grf1>; status = "disabled"; |