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authorSascha Hauer <s.hauer@pengutronix.de>2023-04-18 11:02:37 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2023-05-23 09:11:28 +0200
commitac9157d2f525dd4a1b3c2166bbbbf5861cf0ece3 (patch)
tree45a7e27e25316f4f8a3690fb92ca8ae22e5e10c2 /arch/arm/dts
parentb01ef32a3cd76e1e4029295ef51618a4f49d9f2d (diff)
downloadbarebox-ac9157d2f525dd4a1b3c2166bbbbf5861cf0ece3.tar.gz
barebox-ac9157d2f525dd4a1b3c2166bbbbf5861cf0ece3.tar.xz
ARM: rockchip: Add Radxa ROCK 5B support
Add support for the Radxa ROCK 5B board. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/dts')
-rw-r--r--arch/arm/dts/Makefile1
-rw-r--r--arch/arm/dts/rk3588-rock-5b.dts110
2 files changed, 111 insertions, 0 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 220e1617e3..98f4c4e019 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -109,6 +109,7 @@ lwl-$(CONFIG_MACH_PROTONIC_STM32MP1) += \
stm32mp151-prtt1s.dtb.o
lwl-$(CONFIG_MACH_RADXA_ROCK) += rk3188-radxarock.dtb.o
lwl-$(CONFIG_MACH_RADXA_ROCK3) += rk3568-rock-3a.dtb.o
+lwl-$(CONFIG_MACH_RADXA_ROCK5) += rk3588-rock-5b.dtb.o
lwl-$(CONFIG_MACH_RADXA_CM3) += rk3566-cm3-io.dtb.o
lwl-$(CONFIG_MACH_PHYTEC_SOM_RK3288) += rk3288-phycore-som.dtb.o
lwl-$(CONFIG_MACH_REALQ7) += imx6q-dmo-edmqmx6.dtb.o
diff --git a/arch/arm/dts/rk3588-rock-5b.dts b/arch/arm/dts/rk3588-rock-5b.dts
new file mode 100644
index 0000000000..737498df3d
--- /dev/null
+++ b/arch/arm/dts/rk3588-rock-5b.dts
@@ -0,0 +1,110 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include <arm64/rockchip/rk3588-rock-5b.dts>
+#include "rk3588.dtsi"
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ aliases {
+ mmc1 = &sdmmc;
+ };
+
+ chosen: chosen {
+ environment-emmc {
+ compatible = "barebox,environment";
+ device-path = &environment_emmc;
+ status = "disabled";
+ };
+
+ environment-sd {
+ compatible = "barebox,environment";
+ device-path = &environment_sd;
+ status = "disabled";
+ };
+ };
+
+ vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie2x1l2";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <5000>;
+ };
+
+ vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie2x1l0";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ regulator-boot-on;
+ regulator-always-on;
+ gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <50000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc3v3_pcie30: vcc3v3-pcie30 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie30";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <5000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+&combphy0_ps {
+ status = "okay";
+};
+
+&pcie2x1l2 {
+ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie2x1l2>;
+ status = "okay";
+};
+
+/* Not yet working in barebox */
+&sdhci {
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ environment_emmc: partition@408000 {
+ label = "barebox-environment";
+ reg = <0x0 0x408000 0x0 0x8000>;
+ };
+ };
+};
+
+/* Not yet working in barebox */
+&sdmmc {
+ max-frequency = <200000000>;
+ no-sdio;
+ no-mmc;
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ sd-uhs-sdr104;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>;
+ status = "okay";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ environment_sd: partition@408000 {
+ label = "barebox-environment";
+ reg = <0x0 0x408000 0x0 0x8000>;
+ };
+ };
+};