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| author | Andrej Picej <andrej.picej@norik.com> | 2022-04-19 14:46:59 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-04-20 08:46:14 +0200 |
| commit | f1a8301c8052905b9b62fa7e9df13662abc834cb (patch) | |
| tree | 1845e4011e08a39e94411d7d0626bef6f9ccdda7 /arch/arm/dts | |
| parent | 526d06e9ebe5e41ca0befdd64fd48a3a30298063 (diff) | |
| download | barebox-f1a8301c8052905b9b62fa7e9df13662abc834cb.tar.gz barebox-f1a8301c8052905b9b62fa7e9df13662abc834cb.tar.xz | |
ARM: pbab01: allow USB-OTG port runtime configuration
Since commit a5a4c1d5a3 ("dts: update to v5.13-rc1"), which synced
kernel dts, USB-OTG port on phyFLEX board was set to work only in
peripheral mode. This has to do with phyFLEX baseboard hardware bug,
which prevents correct USB OTG ID pin detection in kernel code.
Unlike linux kernel, barebox doesn't support OTG auto-detection mode via
ID pin. In barebox, user has to select desired USB mode of operation by
setting 'otg.mode' variable. Thus set the 'dr_mode' property to "otg" to
be able to later select USB OTG operating mode at runtime (either host
or peripheral).
Signed-off-by: Andrej Picej <andrej.picej@norik.com>
Link: https://lore.barebox.org/20220419124659.257134-1-andrej.picej@norik.com
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/dts')
| -rw-r--r-- | arch/arm/dts/imx6qdl-phytec-pbab01.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/dts/imx6qdl-phytec-pbab01.dtsi b/arch/arm/dts/imx6qdl-phytec-pbab01.dtsi index 991c7e4fab..88db962535 100644 --- a/arch/arm/dts/imx6qdl-phytec-pbab01.dtsi +++ b/arch/arm/dts/imx6qdl-phytec-pbab01.dtsi @@ -15,6 +15,10 @@ status = "okay"; }; +&usbotg { + dr_mode = "otg"; +}; + #ifdef USE_STATE_EXAMPLE #include "state-example.dtsi" #endif |