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authorLucas Stach <l.stach@pengutronix.de>2014-11-06 12:23:12 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2014-11-07 07:54:54 +0100
commit67666f90ebc1de78d3f1b69be9b4eb870461e44d (patch)
tree9c1c124d2593bed410c56c7cf3c44730c99cb7f9 /arch/arm/include
parenta3a0dba4507c6c2f198f62900e7064e26ac36e34 (diff)
downloadbarebox-67666f90ebc1de78d3f1b69be9b4eb870461e44d.tar.gz
barebox-67666f90ebc1de78d3f1b69be9b4eb870461e44d.tar.xz
ARM: implement recommended WAR for errata 709718
ARM Cortex A8 errata 709718: "Load and store operations to shared device memory regions may not complete in program order" We implement the recommended workaround in the bootloader as it must be applied before enabling the MMU for the first time. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/errata.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/include/asm/errata.h b/arch/arm/include/asm/errata.h
index e2ffd87360..9525823e4c 100644
--- a/arch/arm/include/asm/errata.h
+++ b/arch/arm/include/asm/errata.h
@@ -12,6 +12,18 @@
* GNU General Public License for more details.
*/
+static inline void enable_arm_errata_709718_war(void)
+{
+ __asm__ __volatile__ (
+ "mrc p15, 0, r0, c10, c2, 0\n"
+ "bic r0, #3 << 16\n"
+ "mcr p15, 0, r0, c10, c2, 0\n"
+ "mrc p15, 0, r0, c1, c0, 0\n"
+ "orr r0, r0, #1 << 28\n"
+ "mcr p15, 0, r0, c1, c0, 0\n"
+ );
+}
+
static inline void enable_arm_errata_716044_war(void)
{
__asm__ __volatile__ (