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| author | Raphael Poggi <poggi.raph@gmail.com> | 2016-07-04 13:52:47 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-07-06 11:23:48 +0200 |
| commit | 928cc6f4ee1c162d8d90e40443f37fcc933ab84f (patch) | |
| tree | eb3a47e0d78db9c81aa68e3a6819fcb2de643c9b /arch/arm/include | |
| parent | e1287b1a8b27d366f459e890fb260deea2906749 (diff) | |
| download | barebox-928cc6f4ee1c162d8d90e40443f37fcc933ab84f.tar.gz barebox-928cc6f4ee1c162d8d90e40443f37fcc933ab84f.tar.xz | |
arm: cpu: add arm64 specific code
This patch adds arm64 specific codes, which are:
- exception support
- cache support
- rework Makefile to support arm64
Signed-off-by: Raphael Poggi <poggi.raph@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/cache.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h index 2f6eab0e82..8fcdb64f74 100644 --- a/arch/arm/include/asm/cache.h +++ b/arch/arm/include/asm/cache.h @@ -1,9 +1,18 @@ #ifndef __ASM_CACHE_H #define __ASM_CACHE_H +#ifdef CONFIG_CPU_64v8 +extern void v8_invalidate_icache_all(void); +extern void v8_dcache_all(void); +#endif + static inline void flush_icache(void) { +#if __LINUX_ARM_ARCH__ <= 7 asm volatile("mcr p15, 0, %0, c7, c5, 0" : : "r" (0)); +#else + v8_invalidate_icache_all(); +#endif } int arm_set_cache_functions(void); |