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authorLucas Stach <l.stach@pengutronix.de>2018-11-01 10:18:38 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2018-11-02 07:24:15 +0100
commit41292192c01bc17b7c53642d66e434ce24eb3f25 (patch)
tree16dfa395048517791995147d0a6328e8a85c0ff6 /arch/arm/include
parentd34e8630185179ebf7ccbdbd15f2dc7d44486476 (diff)
downloadbarebox-41292192c01bc17b7c53642d66e434ce24eb3f25.tar.gz
barebox-41292192c01bc17b7c53642d66e434ce24eb3f25.tar.xz
ARM: safely switch from HYP to SVC mode if required
This is a port of the Linux safe_svcmode_maskall macro to the Barebox lowlevel init. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Roland Hieber <r.hieber@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/system.h26
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 5cf828ea36..48242ab473 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -60,6 +60,32 @@
#define CR_AFE (1 << 29) /* Access flag enable */
#define CR_TE (1 << 30) /* Thumb exception enable */
+/*
+ * PSR bits
+ */
+#define USR_MODE 0x00000010
+#define FIQ_MODE 0x00000011
+#define IRQ_MODE 0x00000012
+#define SVC_MODE 0x00000013
+#define ABT_MODE 0x00000017
+#define HYP_MODE 0x0000001a
+#define UND_MODE 0x0000001b
+#define SYSTEM_MODE 0x0000001f
+#define MODE32_BIT 0x00000010
+#define MODE_MASK 0x0000001f
+
+#define PSR_T_BIT 0x00000020
+#define PSR_F_BIT 0x00000040
+#define PSR_I_BIT 0x00000080
+#define PSR_A_BIT 0x00000100
+#define PSR_E_BIT 0x00000200
+#define PSR_J_BIT 0x01000000
+#define PSR_Q_BIT 0x08000000
+#define PSR_V_BIT 0x10000000
+#define PSR_C_BIT 0x20000000
+#define PSR_Z_BIT 0x40000000
+#define PSR_N_BIT 0x80000000
+
#ifndef __ASSEMBLY__
#if __LINUX_ARM_ARCH__ >= 7
static inline unsigned int current_el(void)