ARM: images: use piggydata

The way we assemble the multi images on ARM is rather complicated and
error prone. We currently cat the compressed barebox image behind the
PBL executable and need some magic to obtain the size of the payload and
also have to do tricks to reliably get a pointer to the compressed
image.

This patch switches over to compile the compressed payload into the PBL
image itself which has proven to work for the single PBL case and for
the ARM Linux Kernel aswell.

The goal is to unify the single PBL and the multi PBL cases together in
the future to get an easier startup path for ARM.

This patch has been tested on the i.MX53 QSB, i.MX53 Vincell, Beaglebone
black (both MLO and 2nd stage) and a Phytec phyFLEX i.MX6 board.

SoCFPGA Arria10 has also be changed slightly with this patch. We used to
generate a single image (barebox-socfpga-achilles.img) which was
used as xload image and full image. We now instead generate two images:
barebox-socfpga-achilles-xload.img and barebox-socfpga-achilles.img, the
former loaded by the ROM and the latter loaded by the xload image.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

1 files changed, 3 insertions, 3 deletions

diff --git a/arch/arm/lib/pbl.lds.S b/arch/arm/lib/pbl.lds.S
index ddc65bbf45..53c9ce0fe6 100644
--- a/arch/arm/lib/pbl.lds.S
+++ b/arch/arm/lib/pbl.lds.S
@@ -36,6 +36,8 @@ SECTIONS
 {
 	. = BASE;
 
+	.image_start : { *(.__image_start) }
+
 	PRE_IMAGE
 
 	. = ALIGN(4);
@@ -91,9 +93,7 @@ SECTIONS
 	}
 	__piggydata_end = .;
 
-	. = ALIGN(4);
-	.image_end : { *(.__image_end_marker) }
-	__image_end = .;
+	.image_end : { *(.__image_end) }
 
 	_barebox_image_size = __image_end - BASE;
 	_barebox_pbl_size = __bss_start - BASE;