at91sam9: switch to the same api as the kernel

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

1 files changed, 192 insertions, 6 deletions

diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 04f8f4a922..5e321c1e7b 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -13,6 +13,10 @@
 #include <asm/armlinux.h>
 #include <asm/hardware.h>
 #include <asm/arch/board.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91sam9260_matrix.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
 
 static struct memory_platform_data sram_pdata = {
 	.name = "sram0",
@@ -21,7 +25,7 @@ static struct memory_platform_data sram_pdata = {
 
 static struct device_d sdram_dev = {
 	.name     = "mem",
-	.map_base = 0x20000000,
+	.map_base = AT91_CHIPSELECT_1,
 	.platform_data = &sram_pdata,
 };
 
@@ -35,7 +39,7 @@ void at91_add_device_sdram(u32 size)
 #if defined(CONFIG_DRIVER_NET_MACB)
 static struct device_d macb_dev = {
 	.name     = "macb",
-	.map_base = AT91C_BASE_EMACB,
+	.map_base = AT91SAM9260_BASE_EMAC,
 	.size     = 0x1000,
 };
 
@@ -44,6 +48,29 @@ void at91_add_device_eth(struct at91_ether_platform_data *data)
 	if (!data)
 		return;
 
+	/* Pins used for MII and RMII */
+	at91_set_A_periph(AT91_PIN_PA19, 0);	/* ETXCK_EREFCK */
+	at91_set_A_periph(AT91_PIN_PA17, 0);	/* ERXDV */
+	at91_set_A_periph(AT91_PIN_PA14, 0);	/* ERX0 */
+	at91_set_A_periph(AT91_PIN_PA15, 0);	/* ERX1 */
+	at91_set_A_periph(AT91_PIN_PA18, 0);	/* ERXER */
+	at91_set_A_periph(AT91_PIN_PA16, 0);	/* ETXEN */
+	at91_set_A_periph(AT91_PIN_PA12, 0);	/* ETX0 */
+	at91_set_A_periph(AT91_PIN_PA13, 0);	/* ETX1 */
+	at91_set_A_periph(AT91_PIN_PA21, 0);	/* EMDIO */
+	at91_set_A_periph(AT91_PIN_PA20, 0);	/* EMDC */
+
+	if (!(data->flags & AT91SAM_ETHER_RMII)) {
+		at91_set_B_periph(AT91_PIN_PA28, 0);	/* ECRS */
+		at91_set_B_periph(AT91_PIN_PA29, 0);	/* ECOL */
+		at91_set_B_periph(AT91_PIN_PA25, 0);	/* ERX2 */
+		at91_set_B_periph(AT91_PIN_PA26, 0);	/* ERX3 */
+		at91_set_B_periph(AT91_PIN_PA27, 0);	/* ERXCK */
+		at91_set_B_periph(AT91_PIN_PA23, 0);	/* ETX2 */
+		at91_set_B_periph(AT91_PIN_PA24, 0);	/* ETX3 */
+		at91_set_B_periph(AT91_PIN_PA22, 0);	/* ETXER */
+	}
+
 	macb_dev.platform_data = data;
 	register_device(&macb_dev);
 }
@@ -54,12 +81,34 @@ void at91_add_device_eth(struct at91_ether_platform_data *data) {}
 #if defined(CONFIG_NAND_ATMEL)
 static struct device_d nand_dev = {
 	.name     = "atmel_nand",
-	.map_base = 0x40000000,
+	.map_base = AT91_CHIPSELECT_3,
 	.size     = 0x10,
 };
 
 void at91_add_device_nand(struct atmel_nand_data *data)
 {
+	unsigned long csa;
+
+	if (!data)
+		return;
+
+	csa = at91_sys_read(AT91_MATRIX_EBICSA);
+	at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+
+	/* enable pin */
+	if (data->enable_pin)
+		at91_set_gpio_output(data->enable_pin, 1);
+
+	/* ready/busy pin */
+	if (data->rdy_pin)
+		at91_set_gpio_input(data->rdy_pin, 1);
+
+	/* card detect pin */
+	if (data->det_pin)
+		at91_set_gpio_input(data->det_pin, 1);
+
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
+
 	nand_dev.platform_data = data;
 	register_device(&nand_dev);
 }
@@ -69,18 +118,155 @@ void at91_add_device_nand(struct atmel_nand_data *data) {}
 
 static struct device_d dbgu_serial_device = {
 	.name     = "atmel_serial",
-	.map_base = AT91C_BASE_DBGU,
+	.map_base = AT91_BASE_SYS + AT91_DBGU,
+	.size     = 4096,
+};
+
+static inline void configure_dbgu_pins(void)
+{
+	at91_set_A_periph(AT91_PIN_PB14, 0);		/* DRXD */
+	at91_set_A_periph(AT91_PIN_PB15, 1);		/* DTXD */
+}
+
+static struct device_d uart0_serial_device = {
+	.name     = "atmel_serial",
+	.map_base = AT91SAM9260_BASE_US0,
+	.size     = 4096,
+};
+
+static inline void configure_usart0_pins(unsigned pins)
+{
+	at91_set_A_periph(AT91_PIN_PB4, 1);		/* TXD0 */
+	at91_set_A_periph(AT91_PIN_PB5, 0);		/* RXD0 */
+
+	if (pins & ATMEL_UART_RTS)
+		at91_set_A_periph(AT91_PIN_PB26, 0);	/* RTS0 */
+	if (pins & ATMEL_UART_CTS)
+		at91_set_A_periph(AT91_PIN_PB27, 0);	/* CTS0 */
+	if (pins & ATMEL_UART_DTR)
+		at91_set_A_periph(AT91_PIN_PB24, 0);	/* DTR0 */
+	if (pins & ATMEL_UART_DSR)
+		at91_set_A_periph(AT91_PIN_PB22, 0);	/* DSR0 */
+	if (pins & ATMEL_UART_DCD)
+		at91_set_A_periph(AT91_PIN_PB23, 0);	/* DCD0 */
+	if (pins & ATMEL_UART_RI)
+		at91_set_A_periph(AT91_PIN_PB25, 0);	/* RI0 */
+}
+
+static struct device_d uart1_serial_device = {
+	.name     = "atmel_serial",
+	.map_base = AT91SAM9260_BASE_US1,
+	.size     = 4096,
+};
+
+static inline void configure_usart1_pins(unsigned pins)
+{
+	at91_set_A_periph(AT91_PIN_PB6, 1);		/* TXD1 */
+	at91_set_A_periph(AT91_PIN_PB7, 0);		/* RXD1 */
+
+	if (pins & ATMEL_UART_RTS)
+		at91_set_A_periph(AT91_PIN_PB28, 0);	/* RTS1 */
+	if (pins & ATMEL_UART_CTS)
+		at91_set_A_periph(AT91_PIN_PB29, 0);	/* CTS1 */
+}
+
+static struct device_d uart2_serial_device = {
+	.name     = "atmel_serial",
+	.map_base = AT91SAM9260_BASE_US2,
+	.size     = 4096,
+};
+
+static inline void configure_usart2_pins(unsigned pins)
+{
+	at91_set_A_periph(AT91_PIN_PB8, 1);		/* TXD2 */
+	at91_set_A_periph(AT91_PIN_PB9, 0);		/* RXD2 */
+
+	if (pins & ATMEL_UART_RTS)
+		at91_set_A_periph(AT91_PIN_PA4, 0);	/* RTS2 */
+	if (pins & ATMEL_UART_CTS)
+		at91_set_A_periph(AT91_PIN_PA5, 0);	/* CTS2 */
+}
+
+static struct device_d uart3_serial_device = {
+	.name     = "atmel_serial",
+	.map_base = AT91SAM9260_BASE_US3,
+	.size     = 4096,
+};
+
+static inline void configure_usart3_pins(unsigned pins)
+{
+	at91_set_A_periph(AT91_PIN_PB10, 1);		/* TXD3 */
+	at91_set_A_periph(AT91_PIN_PB11, 0);		/* RXD3 */
+
+	if (pins & ATMEL_UART_RTS)
+		at91_set_B_periph(AT91_PIN_PC8, 0);	/* RTS3 */
+	if (pins & ATMEL_UART_CTS)
+		at91_set_B_periph(AT91_PIN_PC10, 0);	/* CTS3 */
+}
+
+static struct device_d uart4_serial_device = {
+	.name     = "atmel_serial",
+	.map_base = AT91SAM9260_BASE_US4,
 	.size     = 4096,
 };
 
-void at91_register_uart(unsigned id)
+static inline void configure_usart4_pins(void)
+{
+	at91_set_B_periph(AT91_PIN_PA31, 1);		/* TXD4 */
+	at91_set_B_periph(AT91_PIN_PA30, 0);		/* RXD4 */
+}
+
+static struct device_d uart5_serial_device = {
+	.name     = "atmel_serial",
+	.map_base = AT91SAM9260_BASE_US5,
+	.size     = 4096,
+};
+
+static inline void configure_usart5_pins(void)
+{
+	at91_set_A_periph(AT91_PIN_PB12, 1);		/* TXD5 */
+	at91_set_A_periph(AT91_PIN_PB13, 0);		/* RXD5 */
+}
+
+void at91_register_uart(unsigned id, unsigned pins)
 {
 	switch (id) {
 		case 0:		/* DBGU */
+			configure_dbgu_pins();
+			at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
 			register_device(&dbgu_serial_device);
 			break;
+		case AT91SAM9260_ID_US0:
+			configure_usart0_pins(pins);
+			at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US0);
+			register_device(&uart0_serial_device);
+			break;
+		case AT91SAM9260_ID_US1:
+			configure_usart1_pins(pins);
+			at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US1);
+			register_device(&uart1_serial_device);
+			break;
+		case AT91SAM9260_ID_US2:
+			configure_usart2_pins(pins);
+			at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US2);
+			register_device(&uart2_serial_device);
+			break;
+		case AT91SAM9260_ID_US3:
+			configure_usart3_pins(pins);
+			at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US3);
+			register_device(&uart3_serial_device);
+			break;
+		case AT91SAM9260_ID_US4:
+			configure_usart4_pins();
+			at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US4);
+			register_device(&uart4_serial_device);
+			break;
+		case AT91SAM9260_ID_US5:
+			configure_usart5_pins();
+			at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US5);
+			register_device(&uart5_serial_device);
+			break;
 		default:
 			return;
 	}
-
 }