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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2012-08-03 08:52:39 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2012-08-03 15:51:02 +0200
commit46a11f99ff97396306edeea5615a21e2df1bc377 (patch)
tree6fc4c3bb1f27e0dd883b0f7696ceea856aba8183 /arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
parent1e1c4dcd8c7b8903afe7c622bcb1d4eb4382c264 (diff)
downloadbarebox-46a11f99ff97396306edeea5615a21e2df1bc377.tar.gz
barebox-46a11f99ff97396306edeea5615a21e2df1bc377.tar.xz
at91: sam9260/sam9g20/sam9261/sam9g10/sam9263 add autodetect sdram size
if 0 is passed to at91_add_device_sdram autodetect the sdram size The amount of available ram is determined by the SDRAMC_CR register. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-at91/include/mach/at91sam9_sdramc.h')
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9_sdramc.h28
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h b/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
index 5af2b54b12..1ab61e918b 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
@@ -83,5 +83,33 @@
#define AT91_SDRAMC_MD_SDRAM 0
#define AT91_SDRAMC_MD_LOW_POWER_SDRAM 1
+#ifndef __ASSEMBLY__
+#include <mach/io.h>
+static inline u32 at91_get_sdram_size(void)
+{
+ u32 val;
+ u32 size;
+
+ val = at91_sys_read(AT91_SDRAMC_CR);
+
+ /* Formula:
+ * size = bank << (col + row + 1);
+ * if (bandwidth == 32 bits)
+ * size <<= 1;
+ */
+ size = 1;
+ /* COL */
+ size += (val & AT91_SDRAMC_NC) + 8;
+ /* ROW */
+ size += ((val & AT91_SDRAMC_NR) >> 2) + 11;
+ /* BANK */
+ size = ((val & AT91_SDRAMC_NB) ? 4 : 2) << size;
+ /* bandwidth */
+ if (!(val & AT91_SDRAMC_DBW))
+ size <<= 1;
+
+ return size;
+}
+#endif
#endif