ARM: at91: sama5d2: populate $bootsource and $bootsource_instance

The BootROM passes us information about the boot medium in r4 and we
already use that in first stage and pass it along to second stage
PBL already. To make use of it, we need to pass it to barebox proper, do
this by writing it in the last 4 bytes of the SRAM. As second stage
always run in DRAM, this is safe to do.

We could also write to SRAM directly from first stage, but at91bootstrap
passes info in r4 as well for the sama5d3 boards, so we do it likewise
to maintain compatibility.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

4 files changed, 24 insertions, 3 deletions

diff --git a/arch/arm/mach-at91/ddramc.c b/arch/arm/mach-at91/ddramc.c
index 6dac794689..a241ea9f0a 100644
--- a/arch/arm/mach-at91/ddramc.c
+++ b/arch/arm/mach-at91/ddramc.c
@@ -9,6 +9,7 @@
 #include <mach/hardware.h>
 #include <asm/barebox-arm.h>
 #include <mach/at91_ddrsdrc.h>
+#include <mach/sama5_bootsource.h>
 #include <asm/memory.h>
 #include <pbl.h>
 #include <io.h>
@@ -18,8 +19,9 @@ static unsigned sama5_ramsize(void __iomem *base)
 	return at91_get_ddram_size(base, true);
 }
 
-void __noreturn sama5d2_barebox_entry(void *boarddata)
+void __noreturn sama5d2_barebox_entry(unsigned int r4, void *boarddata)
 {
+	__sama5d2_stashed_bootrom_r4 = r4;
 	barebox_arm_entry(SAMA5_DDRCS, sama5_ramsize(SAMA5D2_BASE_MPDDRC),
 			  boarddata);
 }
diff --git a/arch/arm/mach-at91/include/mach/ddramc.h b/arch/arm/mach-at91/include/mach/ddramc.h
index cd85bb6eab..b929bf5f58 100644
--- a/arch/arm/mach-at91/include/mach/ddramc.h
+++ b/arch/arm/mach-at91/include/mach/ddramc.h
@@ -32,7 +32,6 @@ void at91_lpddr1_sdram_initialize(void __iomem *base_address,
 				  void __iomem *ram_address,
 				  struct at91_ddramc_register *ddramc_config);
 
-void __noreturn sama5d2_barebox_entry(void *boarddata);
-
+void __noreturn sama5d2_barebox_entry(unsigned int r4, void *boarddata);
 
 #endif /* #ifndef __DDRAMC_H__ */
diff --git a/arch/arm/mach-at91/include/mach/sama5_bootsource.h b/arch/arm/mach-at91/include/mach/sama5_bootsource.h
index 29354dcaf3..0f90afe902 100644
--- a/arch/arm/mach-at91/include/mach/sama5_bootsource.h
+++ b/arch/arm/mach-at91/include/mach/sama5_bootsource.h
@@ -43,4 +43,7 @@ static inline int sama5_bootsource_instance(u32 reg)
 	return FIELD_GET(SAMA5_BOOTSOURCE_INSTANCE, reg);
 }
 
+#define __sama5d2_stashed_bootrom_r4 \
+	(*(volatile u32 *)(SAMA5D2_SRAM_BASE + SAMA5D2_SRAM_SIZE - 0x4))
+
 #endif
diff --git a/arch/arm/mach-at91/sama5d2.c b/arch/arm/mach-at91/sama5d2.c
index c498b09645..2ce6d7f36f 100644
--- a/arch/arm/mach-at91/sama5d2.c
+++ b/arch/arm/mach-at91/sama5d2.c
@@ -6,6 +6,7 @@
 #include <mach/aic.h>
 #include <mach/sama5d2.h>
 #include <asm/cache-l2x0.h>
+#include <mach/sama5_bootsource.h>
 #include <asm/mmu.h>
 
 #define SFR_CAN		0x48
@@ -52,3 +53,19 @@ static int sama5d2_init(void)
 	return 0;
 }
 postmmu_initcall(sama5d2_init);
+
+static int sama5d2_bootsource_init(void)
+{
+	u32 r4;
+
+	if (!of_machine_is_compatible("atmel,sama5d2"))
+		return 0;
+
+	r4 = __sama5d2_stashed_bootrom_r4;
+
+	bootsource_set(sama5_bootsource(r4));
+	bootsource_set_instance(sama5_bootsource_instance(r4));
+
+	return 0;
+}
+postcore_initcall(sama5d2_bootsource_init);