diff options
author | Alexander Aring <alex.aring@gmail.com> | 2015-12-19 19:34:01 +0100 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-01-04 09:38:12 +0100 |
commit | 295d6763bf8e44fa453633791c77cd919bccdcab (patch) | |
tree | b740e952ca55ba7cac9aed72d46c4c0a29262926 /arch/arm/mach-bcm283x | |
parent | 9bdfe1ff7fa7f96d5889a3a35e1067d9698b6a94 (diff) | |
download | barebox-295d6763bf8e44fa453633791c77cd919bccdcab.tar.gz barebox-295d6763bf8e44fa453633791c77cd919bccdcab.tar.xz |
bcm2835: introduce mach-bcm283x
This patch changes the most part of mach-bcm2835 to mach-bcm283x. This
prepares to add RPi2 support which is a bcm2836. This patch changes the
Kconfig entry namens to BCM283X for drivers only. These drivers should
working the same in bcm2836.
While updating defconfig I added LED support/trigger option.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-bcm283x')
-rw-r--r-- | arch/arm/mach-bcm283x/Kconfig | 16 | ||||
-rw-r--r-- | arch/arm/mach-bcm283x/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/mach-bcm283x/core.c | 88 | ||||
-rw-r--r-- | arch/arm/mach-bcm283x/include/mach/core.h | 35 | ||||
-rw-r--r-- | arch/arm/mach-bcm283x/include/mach/debug_ll.h | 27 | ||||
-rw-r--r-- | arch/arm/mach-bcm283x/include/mach/mbox.h | 518 | ||||
-rw-r--r-- | arch/arm/mach-bcm283x/include/mach/platform.h | 50 | ||||
-rw-r--r-- | arch/arm/mach-bcm283x/include/mach/wd.h | 47 | ||||
-rw-r--r-- | arch/arm/mach-bcm283x/mbox.c | 154 |
9 files changed, 936 insertions, 0 deletions
diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig new file mode 100644 index 0000000000..f4a7e67438 --- /dev/null +++ b/arch/arm/mach-bcm283x/Kconfig @@ -0,0 +1,16 @@ +if ARCH_BCM283X + +config ARCH_TEXT_BASE + hex + default 0x04000000 + +choice + prompt "Broadcom Board type" + +config MACH_RPI + bool "RaspberryPi (BCM2835/ARM1176JZF-S)" + depends on ARCH_BCM2835 + +endchoice + +endif diff --git a/arch/arm/mach-bcm283x/Makefile b/arch/arm/mach-bcm283x/Makefile new file mode 100644 index 0000000000..940f98cbce --- /dev/null +++ b/arch/arm/mach-bcm283x/Makefile @@ -0,0 +1 @@ +obj-y += core.o mbox.o diff --git a/arch/arm/mach-bcm283x/core.c b/arch/arm/mach-bcm283x/core.c new file mode 100644 index 0000000000..64f3781388 --- /dev/null +++ b/arch/arm/mach-bcm283x/core.c @@ -0,0 +1,88 @@ +/* + * Author: Carlo Caione <carlo@carlocaione.org> + * + * Based on mach-nomadik + * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnio@jcrosoft.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <common.h> +#include <init.h> +#include <restart.h> + +#include <linux/clk.h> +#include <linux/clkdev.h> +#include <linux/err.h> + +#include <io.h> +#include <asm/armlinux.h> +#include <linux/sizes.h> + +#include <mach/platform.h> +#include <mach/wd.h> +#include <mach/core.h> +#include <linux/amba/bus.h> + +static int bcm2835_clk_init(void) +{ + struct clk *clk; + + clk = clk_fixed("apb_pclk", 0); + clk_register_clkdev(clk, "apb_pclk", NULL); + + clk = clk_fixed("uart0-pl0110", 3 * 1000 * 1000); + clk_register_clkdev(clk, NULL, "uart0-pl0110"); + + clk = clk_fixed("bcm2835-cs", 1 * 1000 * 1000); + clk_register_clkdev(clk, NULL, "bcm2835-cs"); + + add_generic_device("bcm2835-cs", DEVICE_ID_SINGLE, NULL, BCM2835_ST_BASE, 0x1C, IORESOURCE_MEM, NULL); + + return 0; +} +postcore_initcall(bcm2835_clk_init); + +void bcm2835_register_uart(void) +{ + amba_apb_device_add(NULL, "uart0-pl011", 0, BCM2835_UART0_BASE, 4096, NULL, 0); +} + +void bcm2835_add_device_sdram(u32 size) +{ + if (!size) + size = get_ram_size((ulong *) BCM2835_SDRAM_BASE, SZ_128M); + + arm_add_mem_device("ram0", BCM2835_SDRAM_BASE, size); +} +#define RESET_TIMEOUT 10 + +static void __noreturn bcm2835_restart_soc(struct restart_handler *rst) +{ + uint32_t rstc; + + rstc = readl(PM_RSTC); + rstc &= ~PM_RSTC_WRCFG_SET; + rstc |= PM_RSTC_WRCFG_FULL_RESET; + writel(PM_PASSWORD | RESET_TIMEOUT, PM_WDOG); + writel(PM_PASSWORD | rstc, PM_RSTC); + + hang(); +} + +static int bcm2835_dev_init(void) +{ + add_generic_device("bcm2835-gpio", 0, NULL, BCM2835_GPIO_BASE, 0xB0, IORESOURCE_MEM, NULL); + restart_handler_register_fn(bcm2835_restart_soc); + return 0; +} +coredevice_initcall(bcm2835_dev_init); diff --git a/arch/arm/mach-bcm283x/include/mach/core.h b/arch/arm/mach-bcm283x/include/mach/core.h new file mode 100644 index 0000000000..b0bed80ea0 --- /dev/null +++ b/arch/arm/mach-bcm283x/include/mach/core.h @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2009 Carlo Caione <carlo@carlocaione.org> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __BCM2835_CORE_H__ +#define __BCM2835_CORE_H__ + +#include <mach/platform.h> + +void bcm2835_register_uart(void); +void bcm2835_add_device_sdram(u32 size); + +static void inline bcm2835_register_mci(void) +{ + add_generic_device("bcm2835_mci", 0, NULL, BCM2835_EMMC_BASE, 0xFC, + IORESOURCE_MEM, NULL); +} + +static void inline bcm2835_register_fb(void) +{ + add_generic_device("bcm2835_fb", 0, NULL, 0, 0, 0, NULL); +} + +#endif diff --git a/arch/arm/mach-bcm283x/include/mach/debug_ll.h b/arch/arm/mach-bcm283x/include/mach/debug_ll.h new file mode 100644 index 0000000000..be93cd95ad --- /dev/null +++ b/arch/arm/mach-bcm283x/include/mach/debug_ll.h @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2014 Antony Pavlov <antonynpavlov@gmail.com> + * + * This file is part of barebox. + * See file CREDITS for list of people who contributed to this project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __MACH_BCM2835_DEBUG_LL_H__ +#define __MACH_BCM2835_DEBUG_LL_H__ + +#include <mach/platform.h> + +#define DEBUG_LL_UART_ADDR BCM2835_UART0_BASE + +#include <asm/debug_ll_pl011.h> + +#endif /* __MACH_BCM2835_DEBUG_LL_H__ */ diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h new file mode 100644 index 0000000000..4c3fd775dd --- /dev/null +++ b/arch/arm/mach-bcm283x/include/mach/mbox.h @@ -0,0 +1,518 @@ +/* + * based on U-Boot code + * + * (C) Copyright 2012 Stephen Warren + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _BCM2835_MBOX_H +#define _BCM2835_MBOX_H + +#include <common.h> + +/* + * The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU") + * and the ARM CPU. The ARM CPU is often thought of as the main CPU. + * However, the VideoCore actually controls the initial SoC boot, and hides + * much of the hardware behind a protocol. This protocol is transported + * using the SoC's mailbox hardware module. + * + * The mailbox hardware supports passing 32-bit values back and forth. + * Presumably by software convention of the firmware, the bottom 4 bits of the + * value are used to indicate a logical channel, and the upper 28 bits are the + * actual payload. Various channels exist using these simple raw messages. See + * https://github.com/raspberrypi/firmware/wiki/Mailboxes for a list. As an + * example, the messages on the power management channel are a bitmask of + * devices whose power should be enabled. + * + * The property mailbox channel passes messages that contain the (16-byte + * aligned) ARM physical address of a memory buffer. This buffer is passed to + * the VC for processing, is modified in-place by the VC, and the address then + * passed back to the ARM CPU as the response mailbox message to indicate + * request completion. The buffers have a generic and extensible format; each + * buffer contains a standard header, a list of "tags", and a terminating zero + * entry. Each tag contains an ID indicating its type, and length fields for + * generic parsing. With some limitations, an arbitrary set of tags may be + * combined together into a single message buffer. This file defines structs + * representing the header and many individual tag layouts and IDs. + */ + +/* Raw mailbox HW */ + +#define BCM2835_MBOX_PHYSADDR 0x2000b880 + +struct bcm2835_mbox_regs { + u32 read; + u32 rsvd0[5]; + u32 status; + u32 config; + u32 write; +}; + +#define BCM2835_MBOX_STATUS_WR_FULL 0x80000000 +#define BCM2835_MBOX_STATUS_RD_EMPTY 0x40000000 + +/* Lower 4-bits are channel ID */ +#define BCM2835_CHAN_MASK 0xf +#define BCM2835_MBOX_PACK(chan, data) (((data) & (~BCM2835_CHAN_MASK)) | \ + (chan & BCM2835_CHAN_MASK)) +#define BCM2835_MBOX_UNPACK_CHAN(val) ((val) & BCM2835_CHAN_MASK) +#define BCM2835_MBOX_UNPACK_DATA(val) ((val) & (~BCM2835_CHAN_MASK)) + +/* Property mailbox buffer structures */ + +#define BCM2835_MBOX_PROP_CHAN 8 + +/* All message buffers must start with this header */ +struct bcm2835_mbox_hdr { + u32 buf_size; + u32 code; +}; + +#define BCM2835_MBOX_REQ_CODE 0 +#define BCM2835_MBOX_RESP_CODE_SUCCESS 0x80000000 + +#define BCM2835_MBOX_STACK_ALIGN(type, name) \ + STACK_ALIGN_ARRAY(type, name, 1, BCM2835_CHAN_MASK + 1) + +#define BCM2835_MBOX_INIT_HDR(_m_) { \ + memset((_m_), 0, sizeof(*(_m_))); \ + (_m_)->hdr.buf_size = sizeof(*(_m_)); \ + (_m_)->hdr.code = 0; \ + (_m_)->end_tag = 0; \ + } + +/* + * A message buffer contains a list of tags. Each tag must also start with + * a standardized header. + */ +struct bcm2835_mbox_tag_hdr { + u32 tag; + u32 val_buf_size; + u32 val_len; +}; + +#define BCM2835_MBOX_INIT_TAG(_t_, _id_) { \ + (_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \ + (_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \ + (_t_)->tag_hdr.val_len = sizeof((_t_)->body.req); \ + } + +#define BCM2835_MBOX_INIT_TAG_NO_REQ(_t_, _id_) { \ + (_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \ + (_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \ + (_t_)->tag_hdr.val_len = 0; \ + } + +/* When responding, the VC sets this bit in val_len to indicate a response */ +#define BCM2835_MBOX_TAG_VAL_LEN_RESPONSE 0x80000000 + +/* + * Below we define the ID and struct for many possible tags. This header only + * defines individual tag structs, not entire message structs, since in + * general an arbitrary set of tags may be combined into a single message. + * Clients of the mbox API are expected to define their own overall message + * structures by combining the header, a set of tags, and a terminating + * entry. For example, + * + * struct msg { + * struct bcm2835_mbox_hdr hdr; + * struct bcm2835_mbox_tag_get_arm_mem get_arm_mem; + * ... perhaps other tags here ... + * u32 end_tag; + * }; + */ + +#define BCM2835_MBOX_TAG_GET_BOARD_REV 0x00010002 + +/* + * 0x2..0xf from: + * http://raspberryalphaomega.org.uk/2013/02/06/automatic-raspberry-pi-board-revision-detection-model-a-b1-and-b2/ + * http://www.raspberrypi.org/forums/viewtopic.php?f=63&t=32733 + * 0x10, 0x11 from swarren's testing + */ +#define BCM2835_BOARD_REV_B_I2C0_2 0x2 +#define BCM2835_BOARD_REV_B_I2C0_3 0x3 +#define BCM2835_BOARD_REV_B_I2C1_4 0x4 +#define BCM2835_BOARD_REV_B_I2C1_5 0x5 +#define BCM2835_BOARD_REV_B_I2C1_6 0x6 +#define BCM2835_BOARD_REV_A_7 0x7 +#define BCM2835_BOARD_REV_A_8 0x8 +#define BCM2835_BOARD_REV_A_9 0x9 +#define BCM2835_BOARD_REV_B_REV2_d 0xd +#define BCM2835_BOARD_REV_B_REV2_e 0xe +#define BCM2835_BOARD_REV_B_REV2_f 0xf +#define BCM2835_BOARD_REV_B_PLUS 0x10 +#define BCM2835_BOARD_REV_CM 0x11 +#define BCM2835_BOARD_REV_A_PLUS 0x12 + +struct bcm2835_mbox_tag_get_board_rev { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + } req; + struct { + u32 rev; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_GET_MAC_ADDRESS 0x00010003 + +struct bcm2835_mbox_tag_get_mac_address { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + } req; + struct { + u8 mac[6]; + u8 pad[2]; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_GET_ARM_MEMORY 0x00010005 + +struct bcm2835_mbox_tag_get_arm_mem { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + } req; + struct { + u32 mem_base; + u32 mem_size; + } resp; + } body; +}; + +#define BCM2835_MBOX_POWER_DEVID_SDHCI 0 +#define BCM2835_MBOX_POWER_DEVID_UART0 1 +#define BCM2835_MBOX_POWER_DEVID_UART1 2 +#define BCM2835_MBOX_POWER_DEVID_USB_HCD 3 +#define BCM2835_MBOX_POWER_DEVID_I2C0 4 +#define BCM2835_MBOX_POWER_DEVID_I2C1 5 +#define BCM2835_MBOX_POWER_DEVID_I2C2 6 +#define BCM2835_MBOX_POWER_DEVID_SPI 7 +#define BCM2835_MBOX_POWER_DEVID_CCP2TX 8 + +#define BCM2835_MBOX_POWER_STATE_RESP_ON (1 << 0) +/* Device doesn't exist */ +#define BCM2835_MBOX_POWER_STATE_RESP_NODEV (1 << 1) + +#define BCM2835_MBOX_TAG_GET_POWER_STATE 0x00020001 + +struct bcm2835_mbox_tag_get_power_state { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + u32 device_id; + } req; + struct { + u32 device_id; + u32 state; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_SET_POWER_STATE 0x00028001 + +#define BCM2835_MBOX_SET_POWER_STATE_REQ_OFF (0 << 0) +#define BCM2835_MBOX_SET_POWER_STATE_REQ_ON (1 << 0) +#define BCM2835_MBOX_SET_POWER_STATE_REQ_WAIT (1 << 1) + +struct bcm2835_mbox_tag_set_power_state { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + u32 device_id; + u32 state; + } req; + struct { + u32 device_id; + u32 state; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_GET_CLOCK_RATE 0x00030002 + +#define BCM2835_MBOX_CLOCK_ID_EMMC 1 +#define BCM2835_MBOX_CLOCK_ID_UART 2 +#define BCM2835_MBOX_CLOCK_ID_ARM 3 +#define BCM2835_MBOX_CLOCK_ID_CORE 4 +#define BCM2835_MBOX_CLOCK_ID_V3D 5 +#define BCM2835_MBOX_CLOCK_ID_H264 6 +#define BCM2835_MBOX_CLOCK_ID_ISP 7 +#define BCM2835_MBOX_CLOCK_ID_SDRAM 8 +#define BCM2835_MBOX_CLOCK_ID_PIXEL 9 +#define BCM2835_MBOX_CLOCK_ID_PWM 10 + +struct bcm2835_mbox_tag_get_clock_rate { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + u32 clock_id; + } req; + struct { + u32 clock_id; + u32 rate_hz; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_ALLOCATE_BUFFER 0x00040001 + +struct bcm2835_mbox_tag_allocate_buffer { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + u32 alignment; + } req; + struct { + u32 fb_address; + u32 fb_size; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_RELEASE_BUFFER 0x00048001 + +struct bcm2835_mbox_tag_release_buffer { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + } req; + struct { + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_BLANK_SCREEN 0x00040002 + +struct bcm2835_mbox_tag_blank_screen { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + /* bit 0 means on, other bits reserved */ + u32 state; + } req; + struct { + u32 state; + } resp; + } body; +}; + +/* Physical means output signal */ +#define BCM2835_MBOX_TAG_GET_PHYSICAL_W_H 0x00040003 +#define BCM2835_MBOX_TAG_TEST_PHYSICAL_W_H 0x00044003 +#define BCM2835_MBOX_TAG_SET_PHYSICAL_W_H 0x00048003 + +struct bcm2835_mbox_tag_physical_w_h { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + /* req not used for get */ + struct { + u32 width; + u32 height; + } req; + struct { + u32 width; + u32 height; + } resp; + } body; +}; + +/* Virtual means display buffer */ +#define BCM2835_MBOX_TAG_GET_VIRTUAL_W_H 0x00040004 +#define BCM2835_MBOX_TAG_TEST_VIRTUAL_W_H 0x00044004 +#define BCM2835_MBOX_TAG_SET_VIRTUAL_W_H 0x00048004 + +struct bcm2835_mbox_tag_virtual_w_h { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + /* req not used for get */ + struct { + u32 width; + u32 height; + } req; + struct { + u32 width; + u32 height; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_GET_DEPTH 0x00040005 +#define BCM2835_MBOX_TAG_TEST_DEPTH 0x00044005 +#define BCM2835_MBOX_TAG_SET_DEPTH 0x00048005 + +struct bcm2835_mbox_tag_depth { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + /* req not used for get */ + struct { + u32 bpp; + } req; + struct { + u32 bpp; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_GET_PIXEL_ORDER 0x00040006 +#define BCM2835_MBOX_TAG_TEST_PIXEL_ORDER 0x00044005 +#define BCM2835_MBOX_TAG_SET_PIXEL_ORDER 0x00048006 + +#define BCM2835_MBOX_PIXEL_ORDER_BGR 0 +#define BCM2835_MBOX_PIXEL_ORDER_RGB 1 + +struct bcm2835_mbox_tag_pixel_order { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + /* req not used for get */ + struct { + u32 order; + } req; + struct { + u32 order; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_GET_ALPHA_MODE 0x00040007 +#define BCM2835_MBOX_TAG_TEST_ALPHA_MODE 0x00044007 +#define BCM2835_MBOX_TAG_SET_ALPHA_MODE 0x00048007 + +#define BCM2835_MBOX_ALPHA_MODE_0_OPAQUE 0 +#define BCM2835_MBOX_ALPHA_MODE_0_TRANSPARENT 1 +#define BCM2835_MBOX_ALPHA_MODE_IGNORED 2 + +struct bcm2835_mbox_tag_alpha_mode { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + /* req not used for get */ + struct { + u32 alpha; + } req; + struct { + u32 alpha; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_GET_PITCH 0x00040008 + +struct bcm2835_mbox_tag_pitch { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + } req; + struct { + u32 pitch; + } resp; + } body; +}; + +/* Offset of display window within buffer */ +#define BCM2835_MBOX_TAG_GET_VIRTUAL_OFFSET 0x00040009 +#define BCM2835_MBOX_TAG_TEST_VIRTUAL_OFFSET 0x00044009 +#define BCM2835_MBOX_TAG_SET_VIRTUAL_OFFSET 0x00048009 + +struct bcm2835_mbox_tag_virtual_offset { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + /* req not used for get */ + struct { + u32 x; + u32 y; + } req; + struct { + u32 x; + u32 y; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_GET_OVERSCAN 0x0004000a +#define BCM2835_MBOX_TAG_TEST_OVERSCAN 0x0004400a +#define BCM2835_MBOX_TAG_SET_OVERSCAN 0x0004800a + +struct bcm2835_mbox_tag_overscan { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + /* req not used for get */ + struct { + u32 top; + u32 bottom; + u32 left; + u32 right; + } req; + struct { + u32 top; + u32 bottom; + u32 left; + u32 right; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_GET_PALETTE 0x0004000b + +struct bcm2835_mbox_tag_get_palette { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + } req; + struct { + u32 data[1024]; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_TEST_PALETTE 0x0004400b + +struct bcm2835_mbox_tag_test_palette { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + u32 offset; + u32 num_entries; + u32 data[256]; + } req; + struct { + u32 is_invalid; + } resp; + } body; +}; + +#define BCM2835_MBOX_TAG_SET_PALETTE 0x0004800b + +struct bcm2835_mbox_tag_set_palette { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + u32 offset; + u32 num_entries; + u32 data[256]; + } req; + struct { + u32 is_invalid; + } resp; + } body; +}; + +/* + * Pass a complete property-style buffer to the VC, and wait until it has + * been processed. + * + * This function expects a pointer to the mbox_hdr structure in an attempt + * to ensure some degree of type safety. However, some number of tags and + * a termination value are expected to immediately follow the header in + * memory, as required by the property protocol. + * + * Returns 0 for success, any other value for error. + */ +int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer); + +#endif diff --git a/arch/arm/mach-bcm283x/include/mach/platform.h b/arch/arm/mach-bcm283x/include/mach/platform.h new file mode 100644 index 0000000000..e55085a75b --- /dev/null +++ b/arch/arm/mach-bcm283x/include/mach/platform.h @@ -0,0 +1,50 @@ +/* + * Extract from arch/arm/mach-bcm2708/include/mach/platform.h + * + * Copyright (C) 2010 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _BCM2835_PLATFORM_H +#define _BCM2835_PLATFORM_H + +/* + * SDRAM + */ +#define BCM2835_SDRAM_BASE 0x00000000 + +/* + * Definitions and addresses for the ARM CONTROL logic + * This file is manually generated. + */ + +#define BCM2835_PERI_BASE 0x20000000 +#define BCM2835_ST_BASE (BCM2835_PERI_BASE + 0x3000) /* System Timer */ +#define BCM2835_DMA_BASE (BCM2835_PERI_BASE + 0x7000) /* DMA controller */ +#define BCM2835_ARM_BASE (BCM2835_PERI_BASE + 0xB000) /* BCM2708 ARM control block */ +#define BCM2835_PM_BASE (BCM2835_PERI_BASE + 0x100000) /* Power Management, Reset controller and Watchdog registers */ +#define BCM2835_GPIO_BASE (BCM2835_PERI_BASE + 0x200000) /* GPIO */ +#define BCM2835_UART0_BASE (BCM2835_PERI_BASE + 0x201000) /* Uart 0 */ +#define BCM2835_MMCI0_BASE (BCM2835_PERI_BASE + 0x202000) /* MMC interface */ +#define BCM2835_SPI0_BASE (BCM2835_PERI_BASE + 0x204000) /* SPI0 */ +#define BCM2835_BSC0_BASE (BCM2835_PERI_BASE + 0x205000) /* BSC0 I2C/TWI */ +#define BCM2835_UART1_BASE (BCM2835_PERI_BASE + 0x215000) /* Uart 1 */ +#define BCM2835_EMMC_BASE (BCM2835_PERI_BASE + 0x300000) /* eMMC interface */ +#define BCM2835_SMI_BASE (BCM2835_PERI_BASE + 0x600000) /* SMI */ +#define BCM2835_BSC1_BASE (BCM2835_PERI_BASE + 0x804000) /* BSC1 I2C/TWI */ +#define BCM2835_USB_BASE (BCM2835_PERI_BASE + 0x980000) /* DTC_OTG USB controller */ +#define BCM2835_MCORE_BASE (BCM2835_PERI_BASE + 0x0000) /* Fake frame buffer device (actually the multicore sync block*/ + +#endif + +/* END */ diff --git a/arch/arm/mach-bcm283x/include/mach/wd.h b/arch/arm/mach-bcm283x/include/mach/wd.h new file mode 100644 index 0000000000..ad8b762d96 --- /dev/null +++ b/arch/arm/mach-bcm283x/include/mach/wd.h @@ -0,0 +1,47 @@ +/* + * Extract from arch/arm/mach-bcm2708/include/mach/platform.h + * + * Copyright (C) 2010 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _WD_H +#define _WD_H + +/* + * Watchdog + */ +#define PM_RSTC (BCM2835_PM_BASE+0x1c) +#define PM_RSTS (BCM2835_PM_BASE+0x20) +#define PM_WDOG (BCM2835_PM_BASE+0x24) + +#define PM_WDOG_RESET 0000000000 +#define PM_PASSWORD 0x5a000000 +#define PM_WDOG_TIME_SET 0x000fffff +#define PM_RSTC_WRCFG_CLR 0xffffffcf +#define PM_RSTC_WRCFG_SET 0x00000030 +#define PM_RSTC_WRCFG_FULL_RESET 0x00000020 +#define PM_RSTC_RESET 0x00000102 + +#define PM_RSTS_HADPOR_SET 0x00001000 +#define PM_RSTS_HADSRH_SET 0x00000400 +#define PM_RSTS_HADSRF_SET 0x00000200 +#define PM_RSTS_HADSRQ_SET 0x00000100 +#define PM_RSTS_HADWRH_SET 0x00000040 +#define PM_RSTS_HADWRF_SET 0x00000020 +#define PM_RSTS_HADWRQ_SET 0x00000010 +#define PM_RSTS_HADDRH_SET 0x00000004 +#define PM_RSTS_HADDRF_SET 0x00000002 +#define PM_RSTS_HADDRQ_SET 0x00000001 + +#endif diff --git a/arch/arm/mach-bcm283x/mbox.c b/arch/arm/mach-bcm283x/mbox.c new file mode 100644 index 0000000000..9d69bc8ea7 --- /dev/null +++ b/arch/arm/mach-bcm283x/mbox.c @@ -0,0 +1,154 @@ +/* + * based on U-Boot code + * + * (C) Copyright 2012 Stephen Warren + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm/io.h> +#include <common.h> +#include <clock.h> +#include <dma.h> + +#include <mach/mbox.h> + +#define TIMEOUT (MSECOND * 1000) + +static int bcm2835_mbox_call_raw(u32 chan, struct bcm2835_mbox_hdr *buffer, + u32 *recv) +{ + struct bcm2835_mbox_regs __iomem *regs = + (struct bcm2835_mbox_regs *)BCM2835_MBOX_PHYSADDR; + uint64_t starttime = get_time_ns(); + u32 send = virt_to_phys(buffer); + u32 val; + + if (send & BCM2835_CHAN_MASK) { + printf("mbox: Illegal mbox data 0x%08x\n", send); + return -EINVAL; + } + + /* Drain any stale responses */ + for (;;) { + val = readl(®s->status); + if (val & BCM2835_MBOX_STATUS_RD_EMPTY) + break; + if (is_timeout(starttime, TIMEOUT)) { + printf("mbox: Timeout draining stale responses\n"); + return -ETIMEDOUT; + } + val = readl(®s->read); + } + + /* Wait for space to send */ + for (;;) { + val = readl(®s->status); + if (!(val & BCM2835_MBOX_STATUS_WR_FULL)) + break; + if (is_timeout(starttime, TIMEOUT)) { + printf("mbox: Timeout waiting for send space\n"); + return -ETIMEDOUT; + } + } + + /* Send the request */ + val = BCM2835_MBOX_PACK(chan, send); + debug("mbox: TX raw: 0x%08x\n", val); + dma_sync_single_for_device((unsigned long)send, buffer->buf_size, + DMA_BIDIRECTIONAL); + writel(val, ®s->write); + + /* Wait for the response */ + for (;;) { + val = readl(®s->status); + if (!(val & BCM2835_MBOX_STATUS_RD_EMPTY)) + break; + if (is_timeout(starttime, TIMEOUT)) { + printf("mbox: Timeout waiting for response\n"); + return -ETIMEDOUT; + } + } + + /* Read the response */ + val = readl(®s->read); + debug("mbox: RX raw: 0x%08x\n", val); + dma_sync_single_for_cpu((unsigned long)send, buffer->buf_size, + DMA_BIDIRECTIONAL); + + /* Validate the response */ + if (BCM2835_MBOX_UNPACK_CHAN(val) != chan) { + printf("mbox: Response channel mismatch\n"); + return -EIO; + } + + *recv = BCM2835_MBOX_UNPACK_DATA(val); + + return 0; +} + +#ifdef DEBUG +void dump_buf(struct bcm2835_mbox_hdr *buffer) +{ + u32 *p; + u32 words; + int i; + + p = (u32 *)buffer; + words = buffer->buf_size / 4; + for (i = 0; i < words; i++) + printf(" 0x%04x: 0x%08x\n", i * 4, p[i]); +} +#endif + +int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer) +{ + int ret; + u32 rbuffer; + struct bcm2835_mbox_tag_hdr *tag; + int tag_index; + +#ifdef DEBUG + printf("mbox: TX buffer\n"); + dump_buf(buffer); +#endif + + ret = bcm2835_mbox_call_raw(chan, buffer, &rbuffer); + if (ret) + return ret; + if (rbuffer != (u32)buffer) { + printf("mbox: Response buffer mismatch\n"); + return -EIO; + } + +#ifdef DEBUG + printf("mbox: RX buffer\n"); + dump_buf(buffer); +#endif + + /* Validate overall response status */ + if (buffer->code != BCM2835_MBOX_RESP_CODE_SUCCESS) { + printf("mbox: Header response code invalid\n"); + return -EIO; + } + + /* Validate each tag's response status */ + tag = (void *)(buffer + 1); + tag_index = 0; + while (tag->tag) { + if (!(tag->val_len & BCM2835_MBOX_TAG_VAL_LEN_RESPONSE)) { + printf("mbox: Tag %d missing val_len response bit\n", + tag_index); + return -EIO; + } + /* + * Clear the reponse bit so clients can just look right at the + * length field without extra processing + */ + tag->val_len &= ~BCM2835_MBOX_TAG_VAL_LEN_RESPONSE; + tag = (void *)(((u8 *)tag) + sizeof(*tag) + tag->val_buf_size); + tag_index++; + } + + return 0; +} |