ARM: rpi: switch to DT probe and multi-image build

This commit switches the RaspberryPi arch over to probe Barebox
from the builtin DT and enables multi-image builds.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

4 files changed, 5 insertions, 62 deletions

diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig
index bb4fe95ab2..1457f114cc 100644
--- a/arch/arm/mach-bcm283x/Kconfig
+++ b/arch/arm/mach-bcm283x/Kconfig
@@ -7,20 +7,19 @@ config ARCH_TEXT_BASE
 config MACH_RPI_COMMON
 	bool
 
-choice
-	prompt "Broadcom Board type"
+menu "select Broadcom BCM283X boards to be built"
 
 config MACH_RPI
 	bool "RaspberryPi (BCM2835/ARM1176JZF-S)"
-	depends on ARCH_BCM2835
+	select CPU_V6
 	select MACH_RPI_COMMON
 
 config MACH_RPI2
 	bool "RaspberryPi 2 (BCM2836/CORTEX-A7)"
-	depends on ARCH_BCM2836
+	select CPU_V7
 	select MACH_RPI_COMMON
 
-endchoice
+endmenu
 
 config MACH_RPI_DEBUG_UART_BASE
 	hex
diff --git a/arch/arm/mach-bcm283x/core.c b/arch/arm/mach-bcm283x/core.c
index 3319ad63c3..fddcb0d1a1 100644
--- a/arch/arm/mach-bcm283x/core.c
+++ b/arch/arm/mach-bcm283x/core.c
@@ -40,21 +40,15 @@ static int bcm2835_clk_init(void)
 
 	clk = clk_fixed("uart0-pl0110", 3 * 1000 * 1000);
 	clk_register_clkdev(clk, NULL, "uart0-pl0110");
+	clk_register_clkdev(clk, NULL, "20201000.serial");
 
 	clk = clk_fixed("bcm2835-cs", 1 * 1000 * 1000);
 	clk_register_clkdev(clk, NULL, "bcm2835-cs");
 
-	add_generic_device("bcm2835-cs", DEVICE_ID_SINGLE, NULL, BCM2835_ST_BASE, 0x1C, IORESOURCE_MEM, NULL);
-
 	return 0;
 }
 postcore_initcall(bcm2835_clk_init);
 
-void bcm2835_register_uart(void)
-{
-	amba_apb_device_add(NULL, "uart0-pl011", 0, BCM2835_UART0_BASE, 4096, NULL, 0);
-}
-
 void bcm2835_add_device_sdram(u32 size)
 {
 	if (!size)
@@ -62,10 +56,3 @@ void bcm2835_add_device_sdram(u32 size)
 
 	arm_add_mem_device("ram0", BCM2835_SDRAM_BASE, size);
 }
-
-static int bcm2835_dev_init(void)
-{
-	add_generic_device("bcm2835-gpio", 0, NULL, BCM2835_GPIO_BASE, 0xB0, IORESOURCE_MEM, NULL);
-	return 0;
-}
-coredevice_initcall(bcm2835_dev_init);
diff --git a/arch/arm/mach-bcm283x/include/mach/core.h b/arch/arm/mach-bcm283x/include/mach/core.h
index 5edd99efa2..a1c47f9154 100644
--- a/arch/arm/mach-bcm283x/include/mach/core.h
+++ b/arch/arm/mach-bcm283x/include/mach/core.h
@@ -18,29 +18,11 @@
 
 #include <mach/platform.h>
 
-void bcm2835_register_uart(void);
 void bcm2835_add_device_sdram(u32 size);
 
-static void inline bcm2835_register_mci(void)
-{
-	add_generic_device("bcm2835_mci", 0, NULL, BCM2835_EMMC_BASE, 0xFC,
-			   IORESOURCE_MEM, NULL);
-}
-
 static void inline bcm2835_register_fb(void)
 {
 	add_generic_device("bcm2835_fb", 0, NULL, 0, 0, 0, NULL);
 }
 
-static void inline bcm2835_register_mbox(void)
-{
-	add_generic_device("bcm2835_mbox", 0, NULL, BCM2835_MBOX_BASE, 0x40,
-			   IORESOURCE_MEM, NULL);
-}
-static void inline bcm2835_register_wd(void)
-{
-	add_generic_device("bcm2835_wd", 0, NULL, BCM2835_PM_BASE, 0x28,
-			   IORESOURCE_MEM, NULL);
-}
-
 #endif
diff --git a/arch/arm/mach-bcm283x/include/mach/platform.h b/arch/arm/mach-bcm283x/include/mach/platform.h
index 09fe78fd41..80b529a46f 100644
--- a/arch/arm/mach-bcm283x/include/mach/platform.h
+++ b/arch/arm/mach-bcm283x/include/mach/platform.h
@@ -28,32 +28,7 @@
  * This file is manually generated.
  */
 
-#ifdef CONFIG_ARCH_BCM2835
-#define BCM2835_PERI_BASE	0x20000000
-#define BCM2835_CACHELINE_SIZE	32
-#elif defined CONFIG_ARCH_BCM2836
-#define BCM2835_PERI_BASE	0x3f000000
 #define BCM2835_CACHELINE_SIZE	64
-#else
-#error "no CONFIG_ARCH_BCM283X defined"
-#endif
-
-#define BCM2835_ST_BASE		(BCM2835_PERI_BASE + 0x3000)	/* System Timer */
-#define BCM2835_DMA_BASE	(BCM2835_PERI_BASE + 0x7000)	/* DMA controller */
-#define BCM2835_ARM_BASE	(BCM2835_PERI_BASE + 0xB000)	/* BCM2708 ARM control block */
-#define BCM2835_MBOX_BASE	(BCM2835_ARM_BASE + 0x880)	/* BCM2835 mailbox */
-#define BCM2835_PM_BASE		(BCM2835_PERI_BASE + 0x100000)	/* Power Management, Reset controller and Watchdog registers */
-#define BCM2835_GPIO_BASE	(BCM2835_PERI_BASE + 0x200000)	/* GPIO */
-#define BCM2835_UART0_BASE	(BCM2835_PERI_BASE + 0x201000)	/* Uart 0 */
-#define BCM2835_MMCI0_BASE	(BCM2835_PERI_BASE + 0x202000)	/* MMC interface */
-#define BCM2835_SPI0_BASE	(BCM2835_PERI_BASE + 0x204000)	/* SPI0 */
-#define BCM2835_BSC0_BASE	(BCM2835_PERI_BASE + 0x205000)	/* BSC0 I2C/TWI */
-#define BCM2835_UART1_BASE	(BCM2835_PERI_BASE + 0x215000)	/* Uart 1 */
-#define BCM2835_EMMC_BASE	(BCM2835_PERI_BASE + 0x300000)	/* eMMC interface */
-#define BCM2835_SMI_BASE	(BCM2835_PERI_BASE + 0x600000)	/* SMI */
-#define BCM2835_BSC1_BASE	(BCM2835_PERI_BASE + 0x804000)	/* BSC1 I2C/TWI */
-#define BCM2835_USB_BASE	(BCM2835_PERI_BASE + 0x980000)	/* DTC_OTG USB controller */
-#define BCM2835_MCORE_BASE	(BCM2835_PERI_BASE + 0x0000)	/* Fake frame buffer device (actually the multicore sync block*/
 
 #endif