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| author | Alexander Shiyan <shc_work@mail.ru> | 2013-02-13 15:41:38 +0400 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2013-02-13 18:34:25 +0100 |
| commit | 1795947ba1956e156160ca8f8298ef1e5414cb74 (patch) | |
| tree | 009e5b67c07309bfc0325941cc3ca0d063003597 /arch/arm/mach-clps711x | |
| parent | 86fda721e300ab63a49602d2b2d5db199ad237b1 (diff) | |
| download | barebox-1795947ba1956e156160ca8f8298ef1e5414cb74.tar.gz barebox-1795947ba1956e156160ca8f8298ef1e5414cb74.tar.xz | |
ARM: clps711x: Adds config option for CPU PLL multiplier
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-clps711x')
| -rw-r--r-- | arch/arm/mach-clps711x/Kconfig | 13 | ||||
| -rw-r--r-- | arch/arm/mach-clps711x/include/mach/clps711x.h | 2 | ||||
| -rw-r--r-- | arch/arm/mach-clps711x/lowlevel.c | 7 |
3 files changed, 19 insertions, 3 deletions
diff --git a/arch/arm/mach-clps711x/Kconfig b/arch/arm/mach-clps711x/Kconfig index f0adeda647..d2873b4c0a 100644 --- a/arch/arm/mach-clps711x/Kconfig +++ b/arch/arm/mach-clps711x/Kconfig @@ -10,6 +10,19 @@ config MACH_CLEP7212 endchoice +menu "CLPS711X specific settings" + +config CLPS711X_CPU_PLL_MULT + int "CPU PLL multiplier (20-50)" + range 20 50 + default "40" + help + Define CPU PLL multiplier. PLL is calculated by formula: + PLL Frequency = (PLL Multiplier / 2) * 3686400 Hz + Default value is 40, for achieve 73 MHz. + +endmenu + config BOARDINFO default "Cirrus Logic CLEP7212" if MACH_CLEP7212 diff --git a/arch/arm/mach-clps711x/include/mach/clps711x.h b/arch/arm/mach-clps711x/include/mach/clps711x.h index 5b8fe829c0..cc65cc85f9 100644 --- a/arch/arm/mach-clps711x/include/mach/clps711x.h +++ b/arch/arm/mach-clps711x/include/mach/clps711x.h @@ -281,6 +281,6 @@ #define MEMCFG_WAITSTATE_2_0 (14 << 2) #define MEMCFG_WAITSTATE_1_0 (15 << 2) -void clps711x_barebox_entry(void); +void clps711x_barebox_entry(u32); #endif diff --git a/arch/arm/mach-clps711x/lowlevel.c b/arch/arm/mach-clps711x/lowlevel.c index cd3216a68a..193f61aa6e 100644 --- a/arch/arm/mach-clps711x/lowlevel.c +++ b/arch/arm/mach-clps711x/lowlevel.c @@ -17,9 +17,8 @@ #include <mach/clps711x.h> -void __naked __bare_init clps711x_barebox_entry(void) +void __naked __bare_init clps711x_barebox_entry(u32 pllmult) { - const u32 pllmult = 50; u32 cpu, bus; /* Setup base clocking, Enable SDQM pins */ @@ -28,6 +27,10 @@ void __naked __bare_init clps711x_barebox_entry(void) /* Check if we running from external 13 MHz clock */ if (!(readl(SYSFLG2) & SYSFLG2_CKMODE)) { + /* Check valid multiplier, default to 74 MHz */ + if ((pllmult < 20) || (pllmult > 50)) + pllmult = 40; + /* Setup PLL */ writel(pllmult << 24, PLLW); asm("nop"); |