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authorSascha Hauer <s.hauer@pengutronix.de>2010-10-15 09:18:41 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2010-10-21 22:21:24 +0200
commitf81edffe0ee1f1236fa3a67fcf63970490f7b5a5 (patch)
tree1734520b107e5c95f142d4fb3c08c76e07f57b7c /arch/arm/mach-imx/clocksource.c
parentca5bfba40e281d2103a4c19da39b382afad73a5f (diff)
downloadbarebox-f81edffe0ee1f1236fa3a67fcf63970490f7b5a5.tar.gz
barebox-f81edffe0ee1f1236fa3a67fcf63970490f7b5a5.tar.xz
i.MX remove wdog registers from header files
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-imx/clocksource.c')
-rw-r--r--arch/arm/mach-imx/clocksource.c23
1 files changed, 19 insertions, 4 deletions
diff --git a/arch/arm/mach-imx/clocksource.c b/arch/arm/mach-imx/clocksource.c
index e49289040d..b8101e948f 100644
--- a/arch/arm/mach-imx/clocksource.c
+++ b/arch/arm/mach-imx/clocksource.c
@@ -101,19 +101,34 @@ static int clocksource_init (void)
core_initcall(clocksource_init);
/*
+ * Watchdog Registers
+ */
+#ifdef CONFIG_ARCH_IMX1
+#define WDOG_WCR 0x00 /* Watchdog Control Register */
+#define WDOG_WSR 0x04 /* Watchdog Service Register */
+#define WDOG_WSTR 0x08 /* Watchdog Status Register */
+#define WDOG_WCR_WDE (1 << 0)
+#else
+#define WDOG_WCR 0x00 /* Watchdog Control Register */
+#define WDOG_WSR 0x02 /* Watchdog Service Register */
+#define WDOG_WSTR 0x04 /* Watchdog Status Register */
+#define WDOG_WCR_WDE (1 << 2)
+#endif
+
+/*
* Reset the cpu by setting up the watchdog timer and let it time out
*/
void __noreturn reset_cpu (unsigned long ignored)
{
/* Disable watchdog and set Time-Out field to 0 */
- WCR = 0x0000;
+ writew(0x0, IMX_WDT_BASE + WDOG_WCR);
/* Write Service Sequence */
- WSR = 0x5555;
- WSR = 0xAAAA;
+ writew(0x5555, IMX_WDT_BASE + WDOG_WSR);
+ writew(0xaaaa, IMX_WDT_BASE + WDOG_WSR);
/* Enable watchdog */
- WCR = WCR_WDE;
+ writew(WDOG_WCR_WDE, IMX_WDT_BASE + WDOG_WCR);
while (1);
/*NOTREACHED*/