ARM i.MX: Add i.MX specific entry point for barebox

Additionally to the generic entry point the i.MX specific ones
calculate the SDRAM size automatically so the boards do not have
to care.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

1 files changed, 115 insertions, 21 deletions

diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c
index 841a9ed796..3585e27719 100644
--- a/arch/arm/mach-imx/esdctl.c
+++ b/arch/arm/mach-imx/esdctl.c
@@ -127,32 +127,18 @@ static inline unsigned long imx_v4_sdram_size(void __iomem *esdctlbase, int cs)
 		return 0;
 	if (cs == 1 && !(ctlval & ESDCTL_V4_ESDCTLx_SDE1))
 		return 0;
-
 	/* one 2GiB cs, memory is returned for cs0 only */
 	if (cs == 1 && (esdmisc & ESDCTL_V4_ESDMISC_ONE_CS))
-		return 9;
-
+		return 0;
 	rows = ((ctlval >> 24) & 0x7) + 11;
-	switch ((ctlval >> 20) & 0x7) {
-	case 0:
-		cols = 9;
-		break;
-	case 1:
-		cols = 10;
-		break;
-	case 2:
-		cols = 11;
-		break;
-	case 3:
+
+	cols = (ctlval >> 20) & 0x7;
+	if (cols == 3)
 		cols = 8;
-		break;
-	case 4:
+	else if (cols == 4)
 		cols = 12;
-		break;
-	default:
-		cols = 0;
-		break;
-	}
+	else
+		cols += 9;
 
 	if (ctlval & ESDCTL_V4_ESDCTLx_DSIZ_32B)
 		width = 4;
@@ -353,3 +339,111 @@ static int imx_esdctl_init(void)
 }
 
 mem_initcall(imx_esdctl_init);
+
+/*
+ * The i.MX SoCs usually have two SDRAM chipselects. The following
+ * SoC specific functions return:
+ *
+ * - cs0 disabled, cs1 disabled: 0
+ * - cs0 enabled, cs1 disabled: SDRAM size for cs0
+ * - cs0 disabled, c1 enabled: 0 (currently assumed that no hardware does this)
+ * - cs0 enabled, cs1 enabled: The largest continuous region, that is, cs0 + cs1
+ *                             if cs0 is taking the whole address space.
+ */
+void __naked __noreturn imx1_barebox_entry(uint32_t boarddata)
+{
+	unsigned long base;
+	unsigned long size;
+
+	base = 0x08000000;
+
+	size = imx_v1_sdram_size((void *)MX1_SDRAMC_BASE_ADDR, 0);
+	if (size == SZ_64M)
+		size += imx_v1_sdram_size((void *)MX1_SDRAMC_BASE_ADDR, 1);
+
+	barebox_arm_entry(base, size, boarddata);
+}
+
+void __naked __noreturn imx25_barebox_entry(uint32_t boarddata)
+{
+	unsigned long base;
+	unsigned long size;
+
+	base = MX25_CSD0_BASE_ADDR;
+
+	size = imx_v2_sdram_size((void *)MX25_ESDCTL_BASE_ADDR, 0);
+	if (size == SZ_256M)
+		size += imx_v2_sdram_size((void *)MX25_ESDCTL_BASE_ADDR, 1);
+
+	barebox_arm_entry(base, size, boarddata);
+}
+
+void __naked __noreturn imx27_barebox_entry(uint32_t boarddata)
+{
+	unsigned long base;
+	unsigned long size;
+
+	base = MX27_CSD0_BASE_ADDR;
+
+	size = imx_v2_sdram_size((void *)MX27_ESDCTL_BASE_ADDR, 0);
+	if (size == SZ_256M)
+		size += imx_v2_sdram_size((void *)MX27_ESDCTL_BASE_ADDR, 1);
+
+	barebox_arm_entry(base, size, boarddata);
+}
+
+void __naked __noreturn imx31_barebox_entry(uint32_t boarddata)
+{
+	unsigned long base;
+	unsigned long size;
+
+	base = MX31_CSD0_BASE_ADDR;
+
+	size = imx_v2_sdram_size((void *)MX31_ESDCTL_BASE_ADDR, 0);
+	if (size == SZ_256M)
+		size += imx_v2_sdram_size((void *)MX31_ESDCTL_BASE_ADDR, 1);
+
+	barebox_arm_entry(base, size, boarddata);
+}
+
+void __naked __noreturn imx35_barebox_entry(uint32_t boarddata)
+{
+	unsigned long base;
+	unsigned long size;
+
+	base = MX35_CSD0_BASE_ADDR;
+
+	size = imx_v2_sdram_size((void *)MX35_ESDCTL_BASE_ADDR, 0);
+	if (size == SZ_256M)
+		size += imx_v2_sdram_size((void *)MX35_ESDCTL_BASE_ADDR, 1);
+
+	barebox_arm_entry(base, size, boarddata);
+}
+
+void __naked __noreturn imx51_barebox_entry(uint32_t boarddata)
+{
+	unsigned long base;
+	unsigned long size;
+
+	base = MX51_CSD0_BASE_ADDR;
+
+	size = imx_v3_sdram_size((void *)MX51_ESDCTL_BASE_ADDR, 0);
+	if (size == SZ_256M)
+		size += imx_v3_sdram_size((void *)MX51_ESDCTL_BASE_ADDR, 1);
+
+	barebox_arm_entry(base, size, boarddata);
+}
+
+void __naked __noreturn imx53_barebox_entry(uint32_t boarddata)
+{
+	unsigned long base;
+	unsigned long size;
+
+	base = MX53_CSD0_BASE_ADDR;
+
+	size = imx_v4_sdram_size((void *)MX53_ESDCTL_BASE_ADDR, 0);
+	if (size == SZ_1G)
+		size += imx_v4_sdram_size((void *)MX53_ESDCTL_BASE_ADDR, 1);
+
+	barebox_arm_entry(base, size, boarddata);
+}