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author | Sascha Hauer <s.hauer@pengutronix.de> | 2012-10-08 00:01:01 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-10-08 21:41:36 +0200 |
commit | 2155bc5ba83aa94949ddf5bc5873475842289f64 (patch) | |
tree | 312703e1f85359e36e032154c2a855b910db65ae /arch/arm/mach-imx/imx1.c | |
parent | 90e9f773c186854adfdef852809f82517dc032da (diff) | |
download | barebox-2155bc5ba83aa94949ddf5bc5873475842289f64.tar.gz barebox-2155bc5ba83aa94949ddf5bc5873475842289f64.tar.xz |
ARM i.MX: move reset source detection code
- for i.MX1 the register is in the System Control unit, so move
the code to arch/arm/mach-imx/imx1.c
- for the other i.MX the register is in the watchdog unit, so move
the code to drivers/watchdog/imxwd.c
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-imx/imx1.c')
-rw-r--r-- | arch/arm/mach-imx/imx1.c | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/imx1.c b/arch/arm/mach-imx/imx1.c index 2b2b924676..7ac16fd818 100644 --- a/arch/arm/mach-imx/imx1.c +++ b/arch/arm/mach-imx/imx1.c @@ -16,6 +16,31 @@ #include <io.h> #include <mach/imx-regs.h> #include <mach/weim.h> +#include <reset_source.h> + +#define MX1_RSR MX1_SCM_BASE_ADDR +#define RSR_EXR (1 << 0) +#define RSR_WDR (1 << 1) + +static void imx1_detect_reset_source(void) +{ + u32 val = readl((void *)MX1_RSR) & 0x3; + + switch (val) { + case RSR_EXR: + set_reset_source(RESET_RST); + return; + case RSR_WDR: + set_reset_source(RESET_WDG); + return; + case 0: + set_reset_source(RESET_POR); + return; + default: + /* else keep the default 'unknown' state */ + return; + } +} void imx1_setup_eimcs(size_t cs, unsigned upper, unsigned lower) { @@ -25,6 +50,8 @@ void imx1_setup_eimcs(size_t cs, unsigned upper, unsigned lower) static int imx1_init(void) { + imx1_detect_reset_source(); + add_generic_device("imx1-ccm", 0, NULL, MX1_CCM_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL); add_generic_device("imx1-gpt", 0, NULL, MX1_TIM1_BASE_ADDR, 0x100, IORESOURCE_MEM, NULL); add_generic_device("imx1-gpio", 0, NULL, MX1_GPIO1_BASE_ADDR, 0x100, IORESOURCE_MEM, NULL); |