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authorAndrey Smirnov <andrew.smirnov@gmail.com>2016-09-29 15:21:42 -0700
committerSascha Hauer <s.hauer@pengutronix.de>2016-10-04 08:09:34 +0200
commit916e79ceec2df1ccb9fcefc074560fc81027e91a (patch)
tree831978a42f2560259f91b2e982c1ede092ac7d41 /arch/arm/mach-imx/imx6.c
parentced75605284875a58fdff3574cad9550d8bbf297 (diff)
downloadbarebox-916e79ceec2df1ccb9fcefc074560fc81027e91a.tar.gz
barebox-916e79ceec2df1ccb9fcefc074560fc81027e91a.tar.xz
i.MX: Introduce imx6_cpu_revision()
Factor out CPU revision identification code from imx6_init() into a standalone inline function (similar to imx6_cpu_type()), so that it would be possible to use that functionality in PBL code. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-imx/imx6.c')
-rw-r--r--arch/arm/mach-imx/imx6.c38
1 files changed, 1 insertions, 37 deletions
diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index 477fadae80..22999f5f1d 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -25,8 +25,6 @@
#include <asm/mmu.h>
#include <asm/cache-l2x0.h>
-#define SI_REV 0x260
-
void imx6_init_lowlevel(void)
{
void __iomem *aips1 = (void *)MX6_AIPS1_ON_BASE_ADDR;
@@ -126,47 +124,13 @@ void imx6_setup_ipu_qos(void)
int imx6_init(void)
{
const char *cputypestr;
- u32 rev;
u32 mx6_silicon_revision;
imx6_init_lowlevel();
imx6_boot_save_loc();
- rev = readl(MX6_ANATOP_BASE_ADDR + SI_REV);
-
- switch (rev & 0xfff) {
- case 0x00:
- mx6_silicon_revision = IMX_CHIP_REV_1_0;
- break;
-
- case 0x01:
- mx6_silicon_revision = IMX_CHIP_REV_1_1;
- break;
-
- case 0x02:
- mx6_silicon_revision = IMX_CHIP_REV_1_2;
- break;
-
- case 0x03:
- mx6_silicon_revision = IMX_CHIP_REV_1_3;
- break;
-
- case 0x04:
- mx6_silicon_revision = IMX_CHIP_REV_1_4;
- break;
-
- case 0x05:
- mx6_silicon_revision = IMX_CHIP_REV_1_5;
- break;
-
- case 0x100:
- mx6_silicon_revision = IMX_CHIP_REV_2_0;
- break;
-
- default:
- mx6_silicon_revision = IMX_CHIP_REV_UNKNOWN;
- }
+ mx6_silicon_revision = imx6_cpu_revision();
switch (imx6_cpu_type()) {
case IMX6_CPUTYPE_IMX6Q: