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| author | Lucas Stach <l.stach@pengutronix.de> | 2018-07-25 16:44:37 +0200 |
|---|---|---|
| committer | Lucas Stach <l.stach@pengutronix.de> | 2018-07-27 12:11:40 +0200 |
| commit | 7ba0f2d29959256025ece9ae961a6c3421445a7f (patch) | |
| tree | 6f50f54a7f82f0a6135d018b63b8863e3c2adc1b /arch/arm/mach-imx/include/mach/bbu.h | |
| parent | 87c08ac664272a5a440be1b9323612d30b5bd64e (diff) | |
| download | barebox-7ba0f2d29959256025ece9ae961a6c3421445a7f.tar.gz barebox-7ba0f2d29959256025ece9ae961a6c3421445a7f.tar.xz | |
ARM: mmu: fix cache flushing when replacing a section with a PTE
When replacing a section with a PTE, we must make sure that the newly
initialized PTE entries are flushed from the cache before changing the
entry in the TTB. Otherwise a L1 TLB miss causes the hardware pagetable
walker to walk into a PTE with undefined content, causing exactly that
behaviour.
Move all the necessary cache flushing to arm_create_pte(), to avoid any
caller getting this wrong in the future.
Fixes: e3e54c644180 (ARM: mmu: Implement on-demand PTE allocation)
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-imx/include/mach/bbu.h')
0 files changed, 0 insertions, 0 deletions