diff options
| author | Alexander Shiyan <shc_work@mail.ru> | 2012-03-24 21:17:32 +0400 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-04-02 10:02:38 +0200 |
| commit | 7ab0a0ac05f99bb7d7796cb9f8be6c1f6a3b2db7 (patch) | |
| tree | efa5bf33ff60fa6a9c49d56947b50041f9ff5219 /arch/arm/mach-imx/include/mach/imx27-regs.h | |
| parent | c7641a1281a4d2f4689450a6aba99b72311477a1 (diff) | |
| download | barebox-7ab0a0ac05f99bb7d7796cb9f8be6c1f6a3b2db7.tar.gz barebox-7ab0a0ac05f99bb7d7796cb9f8be6c1f6a3b2db7.tar.xz | |
i.MX27: Added helper for setup chipselect control register
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-imx/include/mach/imx27-regs.h')
| -rw-r--r-- | arch/arm/mach-imx/include/mach/imx27-regs.h | 28 |
1 files changed, 10 insertions, 18 deletions
diff --git a/arch/arm/mach-imx/include/mach/imx27-regs.h b/arch/arm/mach-imx/include/mach/imx27-regs.h index b7bebae57d..25ea04a556 100644 --- a/arch/arm/mach-imx/include/mach/imx27-regs.h +++ b/arch/arm/mach-imx/include/mach/imx27-regs.h @@ -66,24 +66,9 @@ #define GPCR_BOOT_8BIT_NAND_512 7 /* Chip Select Registers */ -#define CS0U __REG(IMX_WEIM_BASE + 0x00) /* Chip Select 0 Upper Register */ -#define CS0L __REG(IMX_WEIM_BASE + 0x04) /* Chip Select 0 Lower Register */ -#define CS0A __REG(IMX_WEIM_BASE + 0x08) /* Chip Select 0 Addition Register */ -#define CS1U __REG(IMX_WEIM_BASE + 0x10) /* Chip Select 1 Upper Register */ -#define CS1L __REG(IMX_WEIM_BASE + 0x14) /* Chip Select 1 Lower Register */ -#define CS1A __REG(IMX_WEIM_BASE + 0x18) /* Chip Select 1 Addition Register */ -#define CS2U __REG(IMX_WEIM_BASE + 0x20) /* Chip Select 2 Upper Register */ -#define CS2L __REG(IMX_WEIM_BASE + 0x24) /* Chip Select 2 Lower Register */ -#define CS2A __REG(IMX_WEIM_BASE + 0x28) /* Chip Select 2 Addition Register */ -#define CS3U __REG(IMX_WEIM_BASE + 0x30) /* Chip Select 3 Upper Register */ -#define CS3L __REG(IMX_WEIM_BASE + 0x34) /* Chip Select 3 Lower Register */ -#define CS3A __REG(IMX_WEIM_BASE + 0x38) /* Chip Select 3 Addition Register */ -#define CS4U __REG(IMX_WEIM_BASE + 0x40) /* Chip Select 4 Upper Register */ -#define CS4L __REG(IMX_WEIM_BASE + 0x44) /* Chip Select 4 Lower Register */ -#define CS4A __REG(IMX_WEIM_BASE + 0x48) /* Chip Select 4 Addition Register */ -#define CS5U __REG(IMX_WEIM_BASE + 0x50) /* Chip Select 5 Upper Register */ -#define CS5L __REG(IMX_WEIM_BASE + 0x54) /* Chip Select 5 Lower Register */ -#define CS5A __REG(IMX_WEIM_BASE + 0x58) /* Chip Select 5 Addition Register */ +#define CSxU(x) __REG(IMX_WEIM_BASE + (cs * 0x10) + 0x00) /* Chip Select x Upper Register */ +#define CSxL(x) __REG(IMX_WEIM_BASE + (cs * 0x10) + 0x04) /* Chip Select x Lower Register */ +#define CSxA(x) __REG(IMX_WEIM_BASE + (cs * 0x10) + 0x08) /* Chip Select x Addition Register */ #define EIM __REG(IMX_WEIM_BASE + 0x60) /* WEIM Configuration Register */ #include "esdctl.h" @@ -255,4 +240,11 @@ #define IMX_CS4_BASE 0xD4000000 #define IMX_CS5_BASE 0xD6000000 +static inline void imx27_setup_weimcs(size_t cs, unsigned upper, unsigned lower, unsigned addional) +{ + CSxU(cs) = upper; + CSxL(cs) = lower; + CSxA(cs) = addional; +} + #endif /* _IMX27_REGS_H */ |