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authorSascha Hauer <s.hauer@pengutronix.de>2012-11-27 15:32:53 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2012-11-27 21:01:09 +0100
commitabb5c25bbbb73bbb471bc3ad61066fe4720e2c88 (patch)
treec0e005d96bdfecc59791f47903d6bfe653bd2d76 /arch/arm/mach-imx/include/mach/imx27-regs.h
parent6e94a6d8dbb0ca12699cf85d07a66cadbc518747 (diff)
downloadbarebox-abb5c25bbbb73bbb471bc3ad61066fe4720e2c88.tar.gz
barebox-abb5c25bbbb73bbb471bc3ad61066fe4720e2c88.tar.xz
i.MX27 regs remove unnecessary include
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-imx/include/mach/imx27-regs.h')
-rw-r--r--arch/arm/mach-imx/include/mach/imx27-regs.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/include/mach/imx27-regs.h b/arch/arm/mach-imx/include/mach/imx27-regs.h
index 90b4614bdf..44bc1d3fe8 100644
--- a/arch/arm/mach-imx/include/mach/imx27-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx27-regs.h
@@ -124,8 +124,6 @@
#define MX27_WBCR 0x1C /* Well Bias Control Register */
#define MX27_DSCR(x) (0x1C + ((x) << 2)) /* Driving Strength Control Register 1 - 13 */
-#include "esdctl.h"
-
/* PLL registers (base: MX27_CCM_BASE_ADDR) */
#define MX27_CSCR 0x00 /* Clock Source Control Register */
#define MX27_MPCTL0 0x04 /* MCU PLL Control Register 0 */