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author | Sascha Hauer <s.hauer@pengutronix.de> | 2014-01-08 13:04:45 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-01-14 17:01:33 +0100 |
commit | 764ae1647cafad7c28db7875c49bbaf5af6ed7c0 (patch) | |
tree | fd07108734ad4c76350f189b763f39b175ae26c1 /arch/arm/mach-imx/include | |
parent | c4a311dc0e8666c85c22a7a12f01b50601fdd41a (diff) | |
download | barebox-764ae1647cafad7c28db7875c49bbaf5af6ed7c0.tar.gz barebox-764ae1647cafad7c28db7875c49bbaf5af6ed7c0.tar.xz |
ARM: i.MX: Add correct SoC type detection for i.MX6
Using the ANATOP_SI_REV register we can only distinguish between
i.MX6q/d and i.MX6dl/s SoCs. Take the number of cores into account
to get the exact SoC type.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-imx/include')
-rw-r--r-- | arch/arm/mach-imx/include/mach/imx6.h | 49 |
1 files changed, 41 insertions, 8 deletions
diff --git a/arch/arm/mach-imx/include/mach/imx6.h b/arch/arm/mach-imx/include/mach/imx6.h index 4b2b1c7a69..1898d8150b 100644 --- a/arch/arm/mach-imx/include/mach/imx6.h +++ b/arch/arm/mach-imx/include/mach/imx6.h @@ -9,24 +9,47 @@ void imx6_init_lowlevel(void); #define IMX6_ANATOP_SI_REV 0x260 -#define IMX6_CPUTYPE_IMX6Q 0x63 -#define IMX6_CPUTYPE_IMX6DL 0x61 +#define IMX6_CPUTYPE_IMX6S 0x161 +#define IMX6_CPUTYPE_IMX6DL 0x261 +#define IMX6_CPUTYPE_IMX6D 0x263 +#define IMX6_CPUTYPE_IMX6Q 0x463 -static inline int imx6_cpu_type(void) +#define SCU_CONFIG 0x04 + +static inline int scu_get_core_count(void) +{ + unsigned long base; + unsigned int ncores; + + asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base)); + + ncores = readl(base + SCU_CONFIG); + return (ncores & 0x03) + 1; +} + +static inline int __imx6_cpu_type(void) { uint32_t val; + val = readl(MX6_ANATOP_BASE_ADDR + IMX6_ANATOP_SI_REV); + val = (val >> 16) & 0xff; + + val |= scu_get_core_count() << 8; + + return val; +} + +static inline int imx6_cpu_type(void) +{ if (!cpu_is_mx6()) return 0; - val = readl(MX6_ANATOP_BASE_ADDR + IMX6_ANATOP_SI_REV); - - return (val >> 16) & 0xff; + return __imx6_cpu_type(); } -static inline int cpu_is_mx6q(void) +static inline int cpu_is_mx6s(void) { - return imx6_cpu_type() == IMX6_CPUTYPE_IMX6Q; + return imx6_cpu_type() == IMX6_CPUTYPE_IMX6S; } static inline int cpu_is_mx6dl(void) @@ -34,4 +57,14 @@ static inline int cpu_is_mx6dl(void) return imx6_cpu_type() == IMX6_CPUTYPE_IMX6DL; } +static inline int cpu_is_mx6d(void) +{ + return imx6_cpu_type() == IMX6_CPUTYPE_IMX6D; +} + +static inline int cpu_is_mx6q(void) +{ + return imx6_cpu_type() == IMX6_CPUTYPE_IMX6Q; +} + #endif /* __MACH_IMX6_H */ |