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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2016-02-05 14:17:14 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-02-05 15:13:28 +0100 |
| commit | 09db5f43f9f36440fcdcf6fbc21257338053bd1c (patch) | |
| tree | c881ff813abc26fa63b66a0fd045e21090771b17 /arch/arm/mach-imx/ocotp.c | |
| parent | 01cf83ba9ca0ca7ed368671ab65d7e5b2b13884f (diff) | |
| download | barebox-09db5f43f9f36440fcdcf6fbc21257338053bd1c.tar.gz barebox-09db5f43f9f36440fcdcf6fbc21257338053bd1c.tar.xz | |
ARM: i.MX: ocotp: Fix error bit handling
Instead of returning an error when a locked region is read, fill
the result with 0xbadabada to indicate a locked region is read.
This way a md -s /dev/imx-ocotp does not abort when it encounters
locked regions.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-imx/ocotp.c')
| -rw-r--r-- | arch/arm/mach-imx/ocotp.c | 23 |
1 files changed, 10 insertions, 13 deletions
diff --git a/arch/arm/mach-imx/ocotp.c b/arch/arm/mach-imx/ocotp.c index 70a89da0e6..a9df08c1b2 100644 --- a/arch/arm/mach-imx/ocotp.c +++ b/arch/arm/mach-imx/ocotp.c @@ -110,14 +110,9 @@ static int imx6_ocotp_wait_busy(struct ocotp_priv *priv, u32 flags) { uint64_t start = get_time_ns(); - while ((OCOTP_CTRL_BUSY | OCOTP_CTRL_ERROR | flags) & - readl(priv->base + OCOTP_CTRL)) { - if (is_timeout(start, MSECOND)) { - /* Clear ERROR bit */ - writel(OCOTP_CTRL_ERROR, priv->base + OCOTP_CTRL_CLR); + while (readl(priv->base + OCOTP_CTRL) & (OCOTP_CTRL_BUSY | flags)) + if (is_timeout(start, MSECOND)) return -ETIMEDOUT; - } - } return 0; } @@ -142,6 +137,8 @@ static int fuse_read_addr(struct ocotp_priv *priv, u32 addr, u32 *pdata) u32 ctrl_reg; int ret; + writel(OCOTP_CTRL_ERROR, priv->base + OCOTP_CTRL_CLR); + ctrl_reg = readl(priv->base + OCOTP_CTRL); ctrl_reg &= ~OCOTP_CTRL_ADDR_MASK; ctrl_reg &= ~OCOTP_CTRL_WR_UNLOCK_MASK; @@ -153,7 +150,10 @@ static int fuse_read_addr(struct ocotp_priv *priv, u32 addr, u32 *pdata) if (ret) return ret; - *pdata = readl(priv->base + OCOTP_READ_FUSE_DATA); + if (readl(priv->base + OCOTP_CTRL) & OCOTP_CTRL_ERROR) + *pdata = 0xbadabada; + else + *pdata = readl(priv->base + OCOTP_READ_FUSE_DATA); return 0; } @@ -175,11 +175,6 @@ int imx6_ocotp_read_one_u32(struct ocotp_priv *priv, u32 index, u32 *pdata) return ret; } - if (readl(priv->base + OCOTP_CTRL) & OCOTP_CTRL_ERROR) { - dev_err(priv->cdev.dev, "bad read status at fuse 0x%08x\n", index); - return -EFAULT; - } - return 0; } @@ -218,6 +213,8 @@ static int fuse_blow_addr(struct ocotp_priv *priv, u32 addr, u32 value) u32 ctrl_reg; int ret; + writel(OCOTP_CTRL_ERROR, priv->base + OCOTP_CTRL_CLR); + /* Control register */ ctrl_reg = readl(priv->base + OCOTP_CTRL); ctrl_reg &= ~OCOTP_CTRL_ADDR_MASK; |