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| author | Joacim Zetterling <joacim.zetterling@westermo.com> | 2022-02-25 15:47:48 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-02-28 10:39:52 +0100 |
| commit | dad2b5636bd823c1987b6b0c3bb1a80a6f45d838 (patch) | |
| tree | 14aeba11c9e18b26554989002193bb93afb6d8f7 /arch/arm/mach-imx | |
| parent | 729ad0c2e8c0b1c4af34174338bbd593bd70050d (diff) | |
| download | barebox-dad2b5636bd823c1987b6b0c3bb1a80a6f45d838.tar.gz barebox-dad2b5636bd823c1987b6b0c3bb1a80a6f45d838.tar.xz | |
ARM: imx: Add imx8 support for 18 bit SDRAM row size handle
The current row calculation in imx_ddrc_sdram_size only handle a
row size up to 16 bit, the row size of the imx8mn DDR4 needs 17 bits.
We need to add DDRC_ADDRMAP7_ROW_B16 and DDRC_ADDRMAP7_ROW_B17 in
the row check table to support a 18 bit row size.
Consulting the reference manual for imx8mm, imx8mn and imx8mq derivates
for 18 bit row size support and it is fin by them.
Signed-off-by: Joacim Zetterling <joacim.zetterling@westermo.com>
Link: https://lore.barebox.org/20220225144751.4160843-2-joacim.zetterling@westermo.com
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-imx')
| -rw-r--r-- | arch/arm/mach-imx/esdctl.c | 14 |
1 files changed, 4 insertions, 10 deletions
diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c index e56da3cb76..8e2d9e0c11 100644 --- a/arch/arm/mach-imx/esdctl.c +++ b/arch/arm/mach-imx/esdctl.c @@ -427,7 +427,8 @@ static resource_size_t imx8m_ddrc_sdram_size(void __iomem *ddrc) readl(ddrc + DDRC_ADDRMAP(4)), readl(ddrc + DDRC_ADDRMAP(5)), readl(ddrc + DDRC_ADDRMAP(6)), - readl(ddrc + DDRC_ADDRMAP(7)) + readl(ddrc + DDRC_ADDRMAP(7)), + readl(ddrc + DDRC_ADDRMAP(8)) }; const u8 col_b[] = { /* @@ -445,15 +446,8 @@ static resource_size_t imx8m_ddrc_sdram_size(void __iomem *ddrc) FIELD_GET(DDRC_ADDRMAP2_COL_B4, addrmap[2]), }; const u8 row_b[] = { - /* - * FIXME: RM mentions the following fields as being - * present, but looking at the code generated by DDR - * tool it doesn't look like those registers are - * really implemented/used. - * - * FIELD_GET(DDRC_ADDRMAP7_ROW_B17, addrmap[7]), - * FIELD_GET(DDRC_ADDRMAP7_ROW_B16, addrmap[7]), - */ + FIELD_GET(DDRC_ADDRMAP7_ROW_B17, addrmap[7]), + FIELD_GET(DDRC_ADDRMAP7_ROW_B16, addrmap[7]), FIELD_GET(DDRC_ADDRMAP6_ROW_B15, addrmap[6]), FIELD_GET(DDRC_ADDRMAP6_ROW_B14, addrmap[6]), FIELD_GET(DDRC_ADDRMAP6_ROW_B13, addrmap[6]), |