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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2019-05-13 12:26:05 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-05-13 12:37:42 +0200 |
| commit | c5c08624f73a0b7e8f822127b256b19ff1b6f553 (patch) | |
| tree | 9e5bcb34a67a3be99affbef2efac404bcc4a974a /arch/arm/mach-layerscape | |
| parent | b0a89d8086577ee0b8d9eb81d7fdd07e8f7662dd (diff) | |
| download | barebox-c5c08624f73a0b7e8f822127b256b19ff1b6f553.tar.gz barebox-c5c08624f73a0b7e8f822127b256b19ff1b6f553.tar.xz | |
ARM: introduce sync_caches_for_execution
We have several places in the code which which prepares just modified code
for execution. This is done differently in all the places, so add a common
function to be used by all.
Most places called arm_early_mmu_cache_flush(). This function includes
invalidating the instruction cache, so doing it again is unnecessary.
Sometimes we had arm_early_mmu_cache_flush() inside #ifdef CONFIG_MMU.
The ifdef seems unnecessary since we do not have it consistently, so
remove the ifdef.
Some early i.MX xload code had icache_invalidate() but forgot to flush
the caches. Replace the instruction cache invalidation with
sync_caches_for_execution().
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-layerscape')
| -rw-r--r-- | arch/arm/mach-layerscape/xload-qspi.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-layerscape/xload-qspi.c b/arch/arm/mach-layerscape/xload-qspi.c index c76780a0e8..192aea64b4 100644 --- a/arch/arm/mach-layerscape/xload-qspi.c +++ b/arch/arm/mach-layerscape/xload-qspi.c @@ -25,7 +25,8 @@ int ls1046a_qspi_start_image(unsigned long r0, unsigned long r1, out_be32(qspi_reg_base, 0x000f400c); memcpy(membase, qspi_mem_base + BAREBOX_START, barebox_image_size); - icache_invalidate(); + + sync_caches_for_execution(); printf("Starting barebox\n"); |