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| author | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2013-07-05 23:21:45 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2013-07-09 08:56:07 +0200 |
| commit | 4ac64ec43fa83cd738b98d25cbc1008ede28d1fd (patch) | |
| tree | 6879a0fc530681175038850af2c5c7a29948dfb5 /arch/arm/mach-mvebu | |
| parent | 60bbb91577b39b27058a1113772fb2018e51d5a9 (diff) | |
| download | barebox-4ac64ec43fa83cd738b98d25cbc1008ede28d1fd.tar.gz barebox-4ac64ec43fa83cd738b98d25cbc1008ede28d1fd.tar.xz | |
ARM: mvebu: add clock aliases for spi0/spi1 on Dove
This adds clock aliases for spi controllers found on Dove to allow
spi driver to get tclk frequency.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mvebu')
| -rw-r--r-- | arch/arm/mach-mvebu/dove.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/include/mach/dove-regs.h | 3 |
2 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-mvebu/dove.c b/arch/arm/mach-mvebu/dove.c index 3909bf4c34..16ee116710 100644 --- a/arch/arm/mach-mvebu/dove.c +++ b/arch/arm/mach-mvebu/dove.c @@ -124,6 +124,8 @@ static int dove_init_soc(void) dove_remap_mc_regs(); dove_init_clocks(); clkdev_add_physbase(tclk, (unsigned int)DOVE_TIMER_BASE, NULL); + clkdev_add_physbase(tclk, (unsigned int)DOVE_SPI0_BASE, NULL); + clkdev_add_physbase(tclk, (unsigned int)DOVE_SPI1_BASE, NULL); add_generic_device("orion-timer", DEVICE_ID_SINGLE, NULL, (unsigned int)DOVE_TIMER_BASE, 0x30, IORESOURCE_MEM, NULL); diff --git a/arch/arm/mach-mvebu/include/mach/dove-regs.h b/arch/arm/mach-mvebu/include/mach/dove-regs.h index 519457e3d4..8b4319bcab 100644 --- a/arch/arm/mach-mvebu/include/mach/dove-regs.h +++ b/arch/arm/mach-mvebu/include/mach/dove-regs.h @@ -33,6 +33,9 @@ #define DOVE_UART_BASE (DOVE_INT_REGS_BASE + 0x12000) #define DOVE_UARTn_BASE(n) (DOVE_UART_BASE + ((n) * 0x100)) +#define DOVE_SPI0_BASE (DOVE_INT_REGS_BASE + 0x10600) +#define DOVE_SPI1_BASE (DOVE_INT_REGS_BASE + 0x14600) + #define DOVE_BRIDGE_BASE (DOVE_INT_REGS_BASE + 0x20000) #define INT_REGS_BASE_MAP 0x080 #define BRIDGE_RSTOUT_MASK 0x108 |