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| author | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2014-04-14 10:12:09 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-06-24 08:25:04 +0200 |
| commit | 7e750b691cf5f1e4bab291ca255b0ad7529e7009 (patch) | |
| tree | 9ab8558ae61314ed7fed75ee913b01bcfb40fdd5 /arch/arm/mach-mvebu | |
| parent | 5be6482b4842895159bd7ece4cc40e41e40d1f90 (diff) | |
| download | barebox-7e750b691cf5f1e4bab291ca255b0ad7529e7009.tar.gz barebox-7e750b691cf5f1e4bab291ca255b0ad7529e7009.tar.xz | |
ARM: mvebu: add 25MHz fixed clock for Armada XP
Armada XP timers can be run from a 25MHz fixed clock. Add the corrsponding
clock and clock alias to SoC setup.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Diffstat (limited to 'arch/arm/mach-mvebu')
| -rw-r--r-- | arch/arm/mach-mvebu/armada-370-xp.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c index 209be0b603..051323eeb3 100644 --- a/arch/arm/mach-mvebu/armada-370-xp.c +++ b/arch/arm/mach-mvebu/armada-370-xp.c @@ -27,6 +27,7 @@ ARMADA_370_XP_UARTn_BASE(CONFIG_MVEBU_CONSOLE_UART) static struct clk *tclk; +static struct clk *refclk; static inline void armada_370_xp_memory_find(unsigned long *phys_base, unsigned long *phys_size) @@ -92,6 +93,7 @@ static int armada_xp_init_clocks(void) { /* On Armada XP, the TCLK frequency is always 250 Mhz */ tclk = clk_fixed("tclk", 250000000); + refclk = clk_fixed("ref25M", 25000000); return 0; } #define armada_370_xp_init_clocks() armada_xp_init_clocks() @@ -106,6 +108,9 @@ static int armada_370_xp_init_soc(void) armada_370_xp_init_clocks(); clkdev_add_physbase(tclk, (unsigned int)ARMADA_370_XP_TIMER_BASE, NULL); + if (refclk && !IS_ERR(refclk)) + clkdev_add_physbase(refclk, (u32)ARMADA_370_XP_TIMER_BASE, + "fixed"); add_generic_device("mvebu-timer", DEVICE_ID_SINGLE, NULL, (unsigned int)ARMADA_370_XP_TIMER_BASE, 0x30, IORESOURCE_MEM, NULL); |