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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2012-07-02 11:08:03 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-07-02 11:08:03 +0200 |
| commit | d04ce5dfe7d2a7502c9a77952164dd6a1e1666a4 (patch) | |
| tree | e3cc1f97ef08950b42223b7334dffe8a721c9a6e /arch/arm/mach-mxs/speed-imx23.c | |
| parent | 1510c57e93fdfdc8f5f6f6b2bbce44ac9a313172 (diff) | |
| parent | 0256d59a41d2ee933fa6e5cc6ee3e933749171e9 (diff) | |
| download | barebox-d04ce5dfe7d2a7502c9a77952164dd6a1e1666a4.tar.gz barebox-d04ce5dfe7d2a7502c9a77952164dd6a1e1666a4.tar.xz | |
Merge branch 'for-next/mxs-nand'
Conflicts:
arch/arm/mach-mxs/Kconfig
arch/arm/mach-mxs/Makefile
drivers/Makefile
Diffstat (limited to 'arch/arm/mach-mxs/speed-imx23.c')
| -rw-r--r-- | arch/arm/mach-mxs/speed-imx23.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/mach-mxs/speed-imx23.c b/arch/arm/mach-mxs/speed-imx23.c index f41b9bc75a..5d0c90dc8c 100644 --- a/arch/arm/mach-mxs/speed-imx23.c +++ b/arch/arm/mach-mxs/speed-imx23.c @@ -47,6 +47,8 @@ # define GET_SSP_DIV(x) ((x) & CLKCTRL_SSP_DIV_MASK) # define SET_SSP_DIV(x) ((x) & CLKCTRL_SSP_DIV_MASK) #define HW_CLKCTRL_GPMI 0x080 +# define CLKCTRL_GPMI_CLKGATE (1 << 31) +# define CLKCTRL_GPMI_DIV_MASK 0x3ff /* note: no set/clear register! */ #define HW_CLKCTRL_SPDIF 0x090 /* note: no set/clear register! */ @@ -288,6 +290,23 @@ unsigned imx_set_sspclk(unsigned index, unsigned nc, int high) return imx_get_sspclk(index); } +void imx_enable_nandclk(void) +{ + uint32_t reg; + + /* Clear bypass bit; refman says clear, but fsl-code does set. Hooray! */ + writel(CLKCTRL_CLKSEQ_BYPASS_GPMI, + IMX_CCM_BASE + HW_CLKCTRL_CLKSEQ + BIT_SET); + + reg = readl(IMX_CCM_BASE + HW_CLKCTRL_GPMI) & ~CLKCTRL_GPMI_CLKGATE; + writel(reg, IMX_CCM_BASE + HW_CLKCTRL_GPMI); + udelay(1000); + /* Initialize DIV to 1 */ + reg &= ~CLKCTRL_GPMI_DIV_MASK; + reg |= 1; + writel(reg, IMX_CCM_BASE + HW_CLKCTRL_GPMI); +} + void imx_dump_clocks(void) { printf("mpll: %10u kHz\n", imx_get_mpllclk() / 1000); |