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| author | Roland Hieber <r.hieber@pengutronix.de> | 2018-08-13 15:02:50 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-08-14 08:54:40 +0200 |
| commit | 59871972698b5587829d3bbb0639f8ccde2587cb (patch) | |
| tree | a79dfca7f2202be5c2610cc05a9f235fa6670cc3 /arch/arm/mach-mxs | |
| parent | b9d14c715e75a12ac6689742982170d2f218081a (diff) | |
| download | barebox-59871972698b5587829d3bbb0639f8ccde2587cb.tar.gz barebox-59871972698b5587829d3bbb0639f8ccde2587cb.tar.xz | |
ARM: MXS: allow configuration of EMI clock prescaler
Allow to set not only the fractional divider, but also the prescaler for
the EMI clock in mxs_mem_init_clock(), and rename the parameters
accordingly to reflect the change. Port the existing board code to set
up the EMI clock explicitely with the old values. Also fix the
off-by-a-half error in the comments, which did not take the prescaler of
2 into account, on which the fractional divider is applied (according to
the i.MX23/i.MX28 Reference Manuals)
Signed-off-by: Roland Hieber <r.hieber@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mxs')
| -rw-r--r-- | arch/arm/mach-mxs/include/mach/init.h | 2 | ||||
| -rw-r--r-- | arch/arm/mach-mxs/mem-init.c | 19 |
2 files changed, 10 insertions, 11 deletions
diff --git a/arch/arm/mach-mxs/include/mach/init.h b/arch/arm/mach-mxs/include/mach/init.h index 7021981d41..66dfd635de 100644 --- a/arch/arm/mach-mxs/include/mach/init.h +++ b/arch/arm/mach-mxs/include/mach/init.h @@ -30,7 +30,7 @@ void mx28_mem_init(const int emi_ds_ctrl_ddr_mode, const uint32_t dram_vals[190]); void mxs_mem_setup_cpu_and_hbus(void); void mxs_mem_setup_vdda(void); -void mxs_mem_init_clock(unsigned char divider); +void mxs_mem_init_clock(const uint8_t clk_emi_div, const uint8_t clk_emi_frac); void mxs_lradc_init(void); void mxs_lradc_enable_batt_measurement(void); diff --git a/arch/arm/mach-mxs/mem-init.c b/arch/arm/mach-mxs/mem-init.c index 7bc6be00b4..568db81302 100644 --- a/arch/arm/mach-mxs/mem-init.c +++ b/arch/arm/mach-mxs/mem-init.c @@ -192,7 +192,12 @@ static void mx23_initialize_dram_values(void) writel((1 << 24), IMX_SDRAMC_BASE + (4 * 8)); } -void mxs_mem_init_clock(unsigned char divider) +/** + * Set up the EMI clock. + * @clk_emi_div: integer divider (prescaler), the DIV_EMI field in HW_CLKCTRL_EMI + * @clk_emi_frac: fractional divider, the EMIFRAC field in HW_CLKCTRL_FRAC0 + */ +void mxs_mem_init_clock(const uint8_t clk_emi_div, const uint8_t clk_emi_frac) { struct mxs_clkctrl_regs *clkctrl_regs = (struct mxs_clkctrl_regs *)IMX_CCM_BASE; @@ -202,7 +207,7 @@ void mxs_mem_init_clock(unsigned char divider) &clkctrl_regs->hw_clkctrl_frac0_set[CLKCTRL_FRAC0_EMI]); /* Set fractional divider for ref_emi */ - writeb(CLKCTRL_FRAC_CLKGATE | (divider & CLKCTRL_FRAC_FRAC_MASK), + writeb(CLKCTRL_FRAC_CLKGATE | (clk_emi_frac & CLKCTRL_FRAC_FRAC_MASK), &clkctrl_regs->hw_clkctrl_frac0[CLKCTRL_FRAC0_EMI]); /* Ungate EMI clock */ @@ -211,8 +216,8 @@ void mxs_mem_init_clock(unsigned char divider) mxs_early_delay(11000); - /* Set EMI clock divider for EMI clock to 411 / 2 = 205MHz */ - writel((2 << CLKCTRL_EMI_DIV_EMI_OFFSET) | + /* Set EMI clock prescaler */ + writel(((clk_emi_div & CLKCTRL_EMI_DIV_EMI_MASK) << CLKCTRL_EMI_DIV_EMI_OFFSET) | (1 << CLKCTRL_EMI_DIV_XTAL_OFFSET), &clkctrl_regs->hw_clkctrl_emi); @@ -273,9 +278,6 @@ void mx23_mem_init(void) { mxs_early_delay(11000); - /* Fractional divider for ref_emi is 33 ; 480 * 18 / 33 = 266MHz */ - mxs_mem_init_clock(33); - /* * Reset/ungate the EMI block. This is essential, otherwise the system * suffers from memory instability. This thing is mx23 specific and is @@ -322,9 +324,6 @@ void mx28_mem_init(const int emi_ds_ctrl_ddr_mode, const uint32_t dram_vals[190] { mxs_early_delay(11000); - /* Fractional divider for ref_emi is 21 ; 480 * 18 / 21 = 411MHz */ - mxs_mem_init_clock(21); - /* Set DDR mode */ writel(emi_ds_ctrl_ddr_mode, IMX_IOMUXC_BASE + 0x1b80); |