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| author | Robert Jarzmik <robert.jarzmik@free.fr> | 2012-01-26 20:55:27 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-02-22 08:27:26 +0100 |
| commit | 5d9e5134a0a23de0b2ff976c7ba5b82e7c5fad5f (patch) | |
| tree | 2f3b1eecebe59767bd95fd1778a8b2745f043466 /arch/arm/mach-pxa | |
| parent | 513def13ce77f2899adcbcb95274563d90049d0d (diff) | |
| download | barebox-5d9e5134a0a23de0b2ff976c7ba5b82e7c5fad5f.tar.gz barebox-5d9e5134a0a23de0b2ff976c7ba5b82e7c5fad5f.tar.xz | |
arm/mach-pxa: add CCCR bits definitions
Add CCCR bits definition for PXA SoC, so that the bootloader
can setup a stable core clock frequency, which is not the
initial reset clock, as required by Intel's PXA27x Processor
family developer's guide, chapter 3.5.5, table 3.7 (clock
frequencies).
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-pxa')
| -rw-r--r-- | arch/arm/mach-pxa/include/mach/pxa2xx-regs.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h index 4762d8a71e..b43648e3c4 100644 --- a/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h +++ b/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h @@ -222,6 +222,11 @@ #define CCCR_N_MASK 0x0380 /* Run Mode Frequency to Turbo Mode Frequency Multiplier */ #define CCCR_M_MASK 0x0060 /* Memory Frequency to Run Mode Frequency Multiplier */ #define CCCR_L_MASK 0x001f /* Crystal Frequency to Memory Frequency Multiplier */ +#define CCCR_CPDIS (1 << 31) +#define CCCR_PPDIS (1 << 30) +#define CCCR_LCD26 (1 << 27) +#define CCCR_PLL_EARLY (1 << 26) +#define CCCR_A (1 << 25) #define CKEN_AC97CONF (1 << 31) /* AC97 Controller Configuration */ #define CKEN_CAMERA (1 << 24) /* Camera Interface Clock Enable */ |