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| author | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2015-11-20 20:35:56 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-11-23 08:00:09 +0100 |
| commit | 968701de69fb7ab7a5dbbed809834737f5af3145 (patch) | |
| tree | 04f88333a82d679b114a9ee5fe57f3082bd34d6c /arch/arm/mach-pxa | |
| parent | bcf9febb9153e6e459cde16cee7cb843a7b7ec66 (diff) | |
| download | barebox-968701de69fb7ab7a5dbbed809834737f5af3145.tar.gz barebox-968701de69fb7ab7a5dbbed809834737f5af3145.tar.xz | |
arm: pxa: Prepare for NAND clkdev lookup on PXA3xx
To allow PXA3xx nand driver to be reused on Marvell Armada 370/XP,
prepare to provide a common clock for the NAND driver on PXA3xx.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-pxa')
| -rw-r--r-- | arch/arm/mach-pxa/Kconfig | 2 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/speed-pxa3xx.c | 18 |
2 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 54094f4ca0..1c0894892b 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -17,6 +17,8 @@ config ARCH_PXA2XX config ARCH_PXA3XX bool select CPU_XSC3 + select CLKDEV_LOOKUP + select COMMON_CLK config ARCH_PXA310 bool diff --git a/arch/arm/mach-pxa/speed-pxa3xx.c b/arch/arm/mach-pxa/speed-pxa3xx.c index 6a08ea78f0..102951736d 100644 --- a/arch/arm/mach-pxa/speed-pxa3xx.c +++ b/arch/arm/mach-pxa/speed-pxa3xx.c @@ -8,6 +8,9 @@ */ #include <common.h> +#include <init.h> +#include <linux/clk.h> +#include <linux/clkdev.h> #include <mach/clock.h> #include <mach/pxa-regs.h> @@ -31,3 +34,18 @@ unsigned long pxa_get_nandclk(void) else return 156000000; } + +static int pxa3xx_clock_init(void) +{ + unsigned long nand_rate = (cpu_is_pxa320()) ? 104000000 : 156000000; + struct clk *clk; + int ret; + + clk = clk_fixed("nand", nand_rate); + ret = clk_register_clkdev(clk, NULL, "nand"); + if (ret) + return ret; + + return 0; +} +postcore_initcall(pxa3xx_clock_init); |