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| author | Andrey Panov <rockford@yandex.ru> | 2015-02-12 22:07:11 +0300 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-02-13 07:21:56 +0100 |
| commit | 2464c7f7d742cbce325b6dfdb2b48cb256360dd0 (patch) | |
| tree | ad6c6832a89bb80975ff7613bc0736e1104077d8 /arch/arm/mach-rockchip | |
| parent | 84fcb11b02df83d89a62ec33d7ed0bbd700b0318 (diff) | |
| download | barebox-2464c7f7d742cbce325b6dfdb2b48cb256360dd0.tar.gz barebox-2464c7f7d742cbce325b6dfdb2b48cb256360dd0.tar.xz | |
ARM: Rockchip: Add DEBUG_LL based on mach-socfpga
Signed-off-by: Andrey Panov <rockford@yandex.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-rockchip')
| -rw-r--r-- | arch/arm/mach-rockchip/include/mach/debug_ll.h | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/arch/arm/mach-rockchip/include/mach/debug_ll.h b/arch/arm/mach-rockchip/include/mach/debug_ll.h new file mode 100644 index 0000000000..c666b99e81 --- /dev/null +++ b/arch/arm/mach-rockchip/include/mach/debug_ll.h @@ -0,0 +1,60 @@ +#ifndef __MACH_DEBUG_LL_H__ +#define __MACH_DEBUG_LL_H__ + +#include <io.h> + +#if CONFIG_DEBUG_ROCKCHIP_UART_PORT == 0 +#define UART_BASE 0x10124000 +#endif +#if CONFIG_DEBUG_ROCKCHIP_UART_PORT == 1 +#define UART_BASE 0x10126000 +#endif +#if CONFIG_DEBUG_ROCKCHIP_UART_PORT == 2 +#define UART_BASE 0x20064000 +#endif +#if CONFIG_DEBUG_ROCKCHIP_UART_PORT == 3 +#define UART_BASE 0x20068000 +#endif + +#define LSR_THRE 0x20 /* Xmit holding register empty */ +#define LSR (5 << 2) +#define THR (0 << 2) + +#define LCR_BKSE 0x80 /* Bank select enable */ +#define LSR (5 << 2) +#define THR (0 << 2) +#define DLL (0 << 2) +#define IER (1 << 2) +#define DLM (1 << 2) +#define FCR (2 << 2) +#define LCR (3 << 2) +#define MCR (4 << 2) +#define MDR (8 << 2) + +static inline void INIT_LL(void) +{ + unsigned int clk = 100000000; + unsigned int divisor = clk / 16 / 115200; + + writeb(0x00, UART_BASE + LCR); + writeb(0x00, UART_BASE + IER); + writeb(0x07, UART_BASE + MDR); + writeb(LCR_BKSE, UART_BASE + LCR); + writeb(divisor & 0xff, UART_BASE + DLL); + writeb(divisor >> 8, UART_BASE + DLM); + writeb(0x03, UART_BASE + LCR); + writeb(0x03, UART_BASE + MCR); + writeb(0x07, UART_BASE + FCR); + writeb(0x00, UART_BASE + MDR); +} + +static inline void PUTC_LL(char c) +{ + /* Wait until there is space in the FIFO */ + while ((readb(UART_BASE + LSR) & LSR_THRE) == 0); + /* Send the character */ + writeb(c, UART_BASE + THR); + /* Wait to make sure it hits the line, in case we die too soon. */ + while ((readb(UART_BASE + LSR) & LSR_THRE) == 0); +} +#endif |