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| author | Juergen Beisert <juergen@kreuzholzen.de> | 2011-02-16 19:13:28 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2011-03-03 16:15:52 +0100 |
| commit | a23e8a61a32f5fa5145e4f835baa5797af7b72e7 (patch) | |
| tree | fa2408df00d3a1eadb98c8cecfe326fad4a341b8 /arch/arm/mach-s3c24xx | |
| parent | d86f8a26f92eb849251c1da0958d2163efe7abe0 (diff) | |
| download | barebox-a23e8a61a32f5fa5145e4f835baa5797af7b72e7.tar.gz barebox-a23e8a61a32f5fa5145e4f835baa5797af7b72e7.tar.xz | |
MACH-S3C24XX: Change detection method of the second SDRAM bank
There is no rule how to connect the SDRAMs to the two clocks signales the CPU
provides. Some boards are using them on a per bank base, some others on a per
chip base. So, the check for the enabled second clock cannot be used to detect
if the second SDRAM bank is populated.
A better way is to check the MT bits of the second SDRAM bank register. When
the init code sets these bits to '00' the second bank is not used for SDRAM
and gets ignored.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-s3c24xx')
| -rw-r--r-- | arch/arm/mach-s3c24xx/generic.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/mach-s3c24xx/generic.c b/arch/arm/mach-s3c24xx/generic.c index c04e0b653e..4c7e799850 100644 --- a/arch/arm/mach-s3c24xx/generic.c +++ b/arch/arm/mach-s3c24xx/generic.c @@ -181,8 +181,9 @@ int s3c24xx_dump_clocks(void) printf("hclk: %7d kHz\n", s3c24xx_get_hclk() / 1000); printf("pclk: %7d kHz\n", s3c24xx_get_pclk() / 1000); printf("SDRAM1: CL%d@%dMHz\n", ((readl(BANKCON6) & 0xc) >> 2) + 2, s3c24xx_get_hclk() / 1000000); - if (!(readl(MISCCR) & (1 << 18))) - printf("SDRAM2: CL%d@%dMHz\n", ((readl(BANKCON7) & 0xc) >> 2) + 2, s3c24xx_get_hclk() / 1000000); + if ((readl(BANKCON7) & (0x3 << 15)) == (0x3 << 15)) + printf("SDRAM2: CL%d@%dMHz\n", ((readl(BANKCON7) & 0xc) >> 2) + 2, + s3c24xx_get_hclk() / 1000000); return 0; } |