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| author | Juergen Beisert <jbe@pengutronix.de> | 2012-01-02 12:44:00 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-01-02 13:32:13 +0100 |
| commit | b8560b2b2f9a12baf42ca6cf426bd59342d4e0a3 (patch) | |
| tree | f7f53805b9fc1f31db7b729d76b5358b1cfe7a7c /arch/arm/mach-samsung | |
| parent | 88200bfb33b304062c0c67c5b0b197b6f862fb60 (diff) | |
| download | barebox-b8560b2b2f9a12baf42ca6cf426bd59342d4e0a3.tar.gz barebox-b8560b2b2f9a12baf42ca6cf426bd59342d4e0a3.tar.xz | |
MACH SAMSUNG/S3C: Unify the UART driver for the S3C family of CPUs
The UART is one of the units which differs only slightly inside the S3C family.
Prepare this driver to share it with more recent CPUs.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-samsung')
| -rw-r--r-- | arch/arm/mach-samsung/include/mach/s3c-iomap.h | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/arch/arm/mach-samsung/include/mach/s3c-iomap.h b/arch/arm/mach-samsung/include/mach/s3c-iomap.h index 9677803fc7..7c45c53c64 100644 --- a/arch/arm/mach-samsung/include/mach/s3c-iomap.h +++ b/arch/arm/mach-samsung/include/mach/s3c-iomap.h @@ -28,7 +28,7 @@ #define S3C_CLOCK_POWER_BASE 0x4C000000 #define S3C2410_LCD_BASE 0x4D000000 #define S3C24X0_NAND_BASE 0x4E000000 -#define S3C24X0_UART_BASE 0x50000000 +#define S3C_UART_BASE 0x50000000 #define S3C_TIMER_BASE 0x51000000 #define S3C2410_USB_DEVICE_BASE 0x52000140 #define S3C_WATCHDOG_BASE 0x53000000 @@ -52,13 +52,12 @@ #endif #define NFC_RAM_SIZE 4096 -/* internal UARTs (driver based) */ -#define UART1_BASE (S3C24X0_UART_BASE) -#define UART1_SIZE 0x4000 -#define UART2_BASE (S3C24X0_UART_BASE + 0x4000) -#define UART2_SIZE 0x4000 -#define UART3_BASE (S3C24X0_UART_BASE + 0x8000) -#define UART3_SIZE 0x4000 +#define S3C_UART1_BASE (S3C_UART_BASE) +#define S3C_UART1_SIZE 0x4000 +#define S3C_UART2_BASE (S3C_UART_BASE + 0x4000) +#define S3C_UART2_SIZE 0x4000 +#define S3C_UART3_BASE (S3C_UART_BASE + 0x8000) +#define S3C_UART3_SIZE 0x4000 /* CS configuration (direct access) */ #define BWSCON (S3C24X0_MEMCTL_BASE) |