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authorSteffen Trumtrar <s.trumtrar@pengutronix.de>2021-06-25 10:59:44 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2021-06-28 22:12:24 +0200
commit37537ea4bdbc5c587178a50fcdf586647832997f (patch)
tree32e2380673681960b572a9fb0b30391dd1171ebc /arch/arm/mach-socfpga
parentc8410bf7fff2d5728224211a9e8da3ffac014a95 (diff)
downloadbarebox-37537ea4bdbc5c587178a50fcdf586647832997f.tar.gz
barebox-37537ea4bdbc5c587178a50fcdf586647832997f.tar.xz
firmware: socfpga: set APPLYCFG after loading bitstream
To make changes to the SDRAM controller effective, the APPLYCFG bit must be set after programming the bitstream to the FPGA. This has to be done without any SDRAM usage. Therefore copy the function to execute to the OCRAM and execute it from there. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Link: https://lore.barebox.org/20210625085944.11260-1-s.trumtrar@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-socfpga')
-rw-r--r--arch/arm/mach-socfpga/include/mach/cyclone5-regs.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/cyclone5-regs.h b/arch/arm/mach-socfpga/include/mach/cyclone5-regs.h
index e88daf7189..1a7d787a27 100644
--- a/arch/arm/mach-socfpga/include/mach/cyclone5-regs.h
+++ b/arch/arm/mach-socfpga/include/mach/cyclone5-regs.h
@@ -18,5 +18,6 @@
#define CYCLONE5_SYSMGR_ADDRESS 0xffd08000
#define CYCLONE5_SCANMGR_ADDRESS 0xfff02000
#define CYCLONE5_SMP_TWD_ADDRESS 0xfffec600
+#define CYCLONE5_OCRAM_ADDRESS 0xffff0000
#endif /* __MACH_SOCFPGA_REGS_H */