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author | Ahmad Fatoum <a.fatoum@pengutronix.de> | 2019-10-28 00:18:30 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-11-06 11:22:35 +0100 |
commit | 3bf910ddb0488689860e8ee6893142a93fdb3cf1 (patch) | |
tree | eb2940a0cb214944cabeb7cc72bb2ceffd9de4e6 /arch/arm/mach-stm32mp/include/mach/smc.h | |
parent | 6fb978dd7162b4aa708eb415f2bb1278403e041c (diff) | |
download | barebox-3bf910ddb0488689860e8ee6893142a93fdb3cf1.tar.gz barebox-3bf910ddb0488689860e8ee6893142a93fdb3cf1.tar.xz |
nvmem: add read support for STM32MP1 bsec OTP
The bsec on the STM32MP157C provides a 380 byte OTP. Add initial support
for reading and writing the shadow copy of the fuses. Direct fuse
access is not yet supported.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-stm32mp/include/mach/smc.h')
-rw-r--r-- | arch/arm/mach-stm32mp/include/mach/smc.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/mach-stm32mp/include/mach/smc.h b/arch/arm/mach-stm32mp/include/mach/smc.h new file mode 100644 index 0000000000..6b8e62bd53 --- /dev/null +++ b/arch/arm/mach-stm32mp/include/mach/smc.h @@ -0,0 +1,28 @@ +#ifndef __MACH_STM32_SMC_H__ +#define __MACH_STM32_SMC_H__ + +#include <linux/arm-smccc.h> + +/* Secure Service access from Non-secure */ +#define STM32_SMC_RCC 0x82001000 +#define STM32_SMC_PWR 0x82001001 +#define STM32_SMC_RTC 0x82001002 +#define STM32_SMC_BSEC 0x82001003 + +/* Register access service use for RCC/RTC/PWR */ +#define STM32_SMC_REG_WRITE 0x1 +#define STM32_SMC_REG_SET 0x2 +#define STM32_SMC_REG_CLEAR 0x3 + +static inline int stm32mp_smc(u32 svc, u8 op, u32 data1, u32 data2, u32 *val) +{ + struct arm_smccc_res res; + + arm_smccc_smc(svc, op, data1, data2, 0, 0, 0, 0, &res); + if (val) + *val = res.a1; + + return (int)res.a0; +} + +#endif |