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authorAhmad Fatoum <a.fatoum@pengutronix.de>2019-06-11 11:43:14 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2019-06-13 08:22:47 +0200
commit09c9203cac8728926db8457ddaa88856afe014d9 (patch)
treea5b93d410d067d7601ebbf765c9e68cb6a263a38 /arch/arm/mach-stm32mp/include/mach/stm32.h
parentafa8665f9f1a5666c63db762fcad53e7425126ef (diff)
downloadbarebox-09c9203cac8728926db8457ddaa88856afe014d9.tar.gz
barebox-09c9203cac8728926db8457ddaa88856afe014d9.tar.xz
ARM: stm32mp1: rename to stm32mp
Serial and clk driver both depend on CONFIG_ARCH_STM32MP1, so either the Kconfig symbol or their depend needs to change. Patches posted by the vendor to Linux, U-Boot and their BSP Yocto-Layer speak of a STM32MP-Family of which the STM32MP1 is the first series, thus rename the arch by dropping the 1. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-stm32mp/include/mach/stm32.h')
-rw-r--r--arch/arm/mach-stm32mp/include/mach/stm32.h35
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h
new file mode 100644
index 0000000000..f9bdb788b9
--- /dev/null
+++ b/arch/arm/mach-stm32mp/include/mach/stm32.h
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
+/*
+ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
+ */
+
+#ifndef _MACH_STM32_H_
+#define _MACH_STM32_H_
+
+/*
+ * Peripheral memory map
+ */
+#define STM32_RCC_BASE 0x50000000
+#define STM32_PWR_BASE 0x50001000
+#define STM32_DBGMCU_BASE 0x50081000
+#define STM32_BSEC_BASE 0x5C005000
+#define STM32_TZC_BASE 0x5C006000
+#define STM32_ETZPC_BASE 0x5C007000
+#define STM32_TAMP_BASE 0x5C00A000
+
+#define STM32_USART1_BASE 0x5C000000
+#define STM32_USART2_BASE 0x4000E000
+#define STM32_USART3_BASE 0x4000F000
+#define STM32_UART4_BASE 0x40010000
+#define STM32_UART5_BASE 0x40011000
+#define STM32_USART6_BASE 0x44003000
+#define STM32_UART7_BASE 0x40018000
+#define STM32_UART8_BASE 0x40019000
+
+#define STM32_SYSRAM_BASE 0x2FFC0000
+#define STM32_SYSRAM_SIZE SZ_256K
+
+#define STM32_DDR_BASE 0xC0000000
+#define STM32_DDR_SIZE SZ_1G
+
+#endif /* _MACH_STM32_H_ */