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| author | Ahmad Fatoum <a.fatoum@pengutronix.de> | 2022-02-20 13:47:20 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-02-23 11:15:44 +0100 |
| commit | 8b7058834d18e796cf8bf5dd3a6111a50986fc39 (patch) | |
| tree | e0e2fc1f0405691815b597e8d14175fb6ab69ff5 /arch/arm/mach-stm32mp | |
| parent | b07c1c88edd3753b8c10ef13b3c6daf78ab88b3f (diff) | |
| download | barebox-8b7058834d18e796cf8bf5dd3a6111a50986fc39.tar.gz barebox-8b7058834d18e796cf8bf5dd3a6111a50986fc39.tar.xz | |
ARM: stm32mp: ddrctrl: fix wrong register field widths
Consulting the reference manual shows that column fields are 4
bits each, but some of them were treated as 5-bit wide. Fix it.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20220220124736.3052502-9-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-stm32mp')
| -rw-r--r-- | arch/arm/mach-stm32mp/ddrctrl.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-stm32mp/ddrctrl.c b/arch/arm/mach-stm32mp/ddrctrl.c index 7f2013c22d..93996d0afc 100644 --- a/arch/arm/mach-stm32mp/ddrctrl.c +++ b/arch/arm/mach-stm32mp/ddrctrl.c @@ -24,12 +24,12 @@ #define ADDRMAP2_COL_B5 GENMASK(27, 24) #define ADDRMAP3_COL_B6 GENMASK( 3, 0) -#define ADDRMAP3_COL_B7 GENMASK(12, 8) -#define ADDRMAP3_COL_B8 GENMASK(20, 16) -#define ADDRMAP3_COL_B9 GENMASK(28, 24) +#define ADDRMAP3_COL_B7 GENMASK(11, 8) +#define ADDRMAP3_COL_B8 GENMASK(19, 16) +#define ADDRMAP3_COL_B9 GENMASK(27, 24) -#define ADDRMAP4_COL_B10 GENMASK( 4, 0) -#define ADDRMAP4_COL_B11 GENMASK(12, 8) +#define ADDRMAP4_COL_B10 GENMASK( 3, 0) +#define ADDRMAP4_COL_B11 GENMASK(11, 8) #define ADDRMAP5_ROW_B0 GENMASK( 3, 0) #define ADDRMAP5_ROW_B1 GENMASK(11, 8) |