tegra: add common lowlevel startup

All Tegra20 boards have a common startup sequence. Also there is an
agreement on how to find out about the installed amount of RAM and other
information needed by early startup. So as there is really no need to do
any lowlevel stuff per board, we can just do it at the ARCH level.

This also enables the first stage loading of barebox by detecting the
currently running CPU and booting the main CPU cluster if neccesary.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Tested-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

1 files changed, 46 insertions, 0 deletions

diff --git a/arch/arm/mach-tegra/tegra_maincomplex_init.c b/arch/arm/mach-tegra/tegra_maincomplex_init.c
new file mode 100644
index 0000000000..dea9c9151d
--- /dev/null
+++ b/arch/arm/mach-tegra/tegra_maincomplex_init.c
@@ -0,0 +1,46 @@
+/*
+ * Copyright (C) 2013 Lucas Stach <l.stach@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <common.h>
+#include <sizes.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+#include <mach/lowlevel.h>
+
+void tegra_maincomplex_entry(void)
+{
+	uint32_t rambase, ramsize;
+
+	arm_cpu_lowlevel_init();
+
+	switch (tegra_get_chiptype()) {
+	case TEGRA20:
+		rambase = 0x0;
+		ramsize = tegra20_get_ramsize();
+		break;
+	default:
+		/* If we don't know the chiptype, better bail out */
+		BUG();
+	}
+
+	/*
+	 * The standard load address for Tegra systems is 0x10800 which means
+	 * the barebox binary will always be below the malloc area for all
+	 * reasonable malloc area sizes. We offset the RAM base address by 8MB
+	 * to pretend barebox is in another bank.
+	 */
+	barebox_arm_entry(rambase + SZ_8M, ramsize - SZ_8M, 0);
+}