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authorLucas Stach <dev@lynxeye.de>2013-12-03 20:56:57 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2013-12-04 14:59:39 +0100
commitfbe8c22a2f9bae3422b615e28ab86a0892284637 (patch)
tree647fe7fd2e5a16fed07d8a496b012e9de978eba8 /arch/arm/mach-tegra/tegra_maincomplex_init.c
parent7b6c063f5786b7552c2c8a97f3c57a3cd5b966a7 (diff)
downloadbarebox-fbe8c22a2f9bae3422b615e28ab86a0892284637.tar.gz
barebox-fbe8c22a2f9bae3422b615e28ab86a0892284637.tar.xz
tegra: switch main CPU complex to PLLX early
Running at 1GHz, rather than 13MHz certainly makes things a bit faster. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-tegra/tegra_maincomplex_init.c')
-rw-r--r--arch/arm/mach-tegra/tegra_maincomplex_init.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/tegra_maincomplex_init.c b/arch/arm/mach-tegra/tegra_maincomplex_init.c
index b3d59abd6b..5aad1dd65e 100644
--- a/arch/arm/mach-tegra/tegra_maincomplex_init.c
+++ b/arch/arm/mach-tegra/tegra_maincomplex_init.c
@@ -20,6 +20,7 @@
#include <asm/barebox-arm.h>
#include <mach/lowlevel.h>
#include <mach/tegra20-pmc.h>
+#include <mach/tegra20-car.h>
void tegra_maincomplex_entry(void)
{
@@ -27,6 +28,14 @@ void tegra_maincomplex_entry(void)
arm_cpu_lowlevel_init();
+ /* switch to PLLX */
+ writel(CRC_CCLK_BURST_POLICY_SYS_STATE_RUN <<
+ CRC_CCLK_BURST_POLICY_SYS_STATE_SHIFT |
+ CRC_CCLK_BURST_POLICY_SRC_PLLX_OUT0 <<
+ CRC_CCLK_BURST_POLICY_RUN_SRC_SHIFT,
+ TEGRA_CLK_RESET_BASE + CRC_CCLK_BURST_POLICY);
+ writel(CRC_SUPER_CDIV_ENB, TEGRA_CLK_RESET_BASE + CRC_SUPER_CCLK_DIV);
+
switch (tegra_get_chiptype()) {
case TEGRA20:
rambase = 0x0;