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authorLucas Stach <dev@lynxeye.de>2014-11-02 21:13:49 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2014-11-03 09:38:37 +0100
commit7cf0a3ea2bb07bd02dfe22a81d34c8614e72f52c (patch)
tree4db2c1e82b642aa21396a6932423f36f387770e4 /arch/arm/mach-tegra
parent7d60a02034bb8816c74d2bbddc0d0981024bed66 (diff)
downloadbarebox-7cf0a3ea2bb07bd02dfe22a81d34c8614e72f52c.tar.gz
barebox-7cf0a3ea2bb07bd02dfe22a81d34c8614e72f52c.tar.xz
tegra: pmc: work around power domain failure
Sometimes a power domain didn't properly power up, reading back the command register seems to fix this by flushing the write. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r--arch/arm/mach-tegra/tegra20-pmc.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/tegra20-pmc.c b/arch/arm/mach-tegra/tegra20-pmc.c
index 4cd01ffc29..dcd2978109 100644
--- a/arch/arm/mach-tegra/tegra20-pmc.c
+++ b/arch/arm/mach-tegra/tegra20-pmc.c
@@ -53,6 +53,8 @@ static int tegra_powergate_set(int id, bool new_state)
}
writel(PMC_PWRGATE_TOGGLE_START | id, pmc_base + PMC_PWRGATE_TOGGLE);
+ /* I don't know exactly why this is needed, seems to flush the write */
+ readl(pmc_base + PMC_PWRGATE_TOGGLE);
return 0;
}