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authorLucas Stach <dev@lynxeye.de>2013-09-29 21:59:36 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2013-10-02 10:24:05 +0200
commitf93b5f8eb973a62affbaf134f07d367649ed3ae4 (patch)
treef738ae6877d030c0c38a8f25b9c2a223bb765e32 /arch/arm/mach-tegra
parentf3cf0157fb57bdd9f85ce74e95ac5c3fcb19bab9 (diff)
downloadbarebox-f93b5f8eb973a62affbaf134f07d367649ed3ae4.tar.gz
barebox-f93b5f8eb973a62affbaf134f07d367649ed3ae4.tar.xz
tegra: switch to multi image
To keep things clean I removed all support for the old way to build images. There is now a single tegra_v7 defconfig which builds both supported Tegra boards as images. The new image generation also paves the way for integration of the tegra-cbootimage tool to produce directly flashable images. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r--arch/arm/mach-tegra/Kconfig20
-rw-r--r--arch/arm/mach-tegra/include/mach/lowlevel.h15
-rw-r--r--arch/arm/mach-tegra/include/mach/tegra20-pmc.h2
-rw-r--r--arch/arm/mach-tegra/tegra_avp_init.c19
-rw-r--r--arch/arm/mach-tegra/tegra_maincomplex_init.c4
5 files changed, 31 insertions, 29 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 4363bce762..3becb84d00 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -4,6 +4,9 @@ config ARCH_TEXT_BASE
hex
default 0x0
+config BOARDINFO
+ default ""
+
choice
prompt "Tegra debug UART"
help
@@ -43,26 +46,17 @@ config ARCH_TEGRA_2x_SOC
bool
select PINCTRL_TEGRA20
-choice
- prompt "select Tegra Board"
+menu "select Tegra boards to be built"
-config MACH_TEGRA20_GENERIC
- bool "Generic DT based board"
+config MACH_TORADEX_COLIBRI_T20_IRIS
+ bool "Toradex Colibri T20 on Iris Carrier"
select ARCH_TEGRA_2x_SOC
- help
- Say Y here if you are building for a generic DT based board.
config MACH_TOSHIBA_AC100
bool "Toshiba AC100"
select ARCH_TEGRA_2x_SOC
- help
- Say Y here if you are using Toshiba AC100 smartbook.
-
-endchoice
-
-if MACH_TEGRA20_GENERIC
-endif #MACH_TEGRA20_GENERIC
+endmenu
# ---------------------------------------------------------
diff --git a/arch/arm/mach-tegra/include/mach/lowlevel.h b/arch/arm/mach-tegra/include/mach/lowlevel.h
index 2d3f31280e..472348acab 100644
--- a/arch/arm/mach-tegra/include/mach/lowlevel.h
+++ b/arch/arm/mach-tegra/include/mach/lowlevel.h
@@ -172,5 +172,20 @@ int tegra_get_osc_clock(void)
}
}
+static inline __attribute__((always_inline))
+void tegra_cpu_lowlevel_setup(void)
+{
+ uint32_t r;
+
+ /* set the cpu to SVC32 mode */
+ __asm__ __volatile__("mrs %0, cpsr":"=r"(r));
+ r &= ~0x1f;
+ r |= 0xd3;
+ __asm__ __volatile__("msr cpsr, %0" : : "r"(r));
+}
+
+/* reset vector for the AVP, to be called from board reset vector */
+void tegra_avp_reset_vector(uint32_t boarddata);
+
/* reset vector for the main CPU complex */
void tegra_maincomplex_entry(void);
diff --git a/arch/arm/mach-tegra/include/mach/tegra20-pmc.h b/arch/arm/mach-tegra/include/mach/tegra20-pmc.h
index d56b845b9f..3a05e0f109 100644
--- a/arch/arm/mach-tegra/include/mach/tegra20-pmc.h
+++ b/arch/arm/mach-tegra/include/mach/tegra20-pmc.h
@@ -65,3 +65,5 @@
#define PMC_PWRGATE_STATUS_VE (1 << 2)
#define PMC_PWRGATE_STATUS_TD (1 << 1)
#define PMC_PWRGATE_STATUS_CPU (1 << 0)
+
+#define PMC_SCRATCH(i) (0x050 + 0x4*i)
diff --git a/arch/arm/mach-tegra/tegra_avp_init.c b/arch/arm/mach-tegra/tegra_avp_init.c
index 557af666a7..6cabdb3b92 100644
--- a/arch/arm/mach-tegra/tegra_avp_init.c
+++ b/arch/arm/mach-tegra/tegra_avp_init.c
@@ -24,17 +24,6 @@
#include <mach/tegra20-car.h>
#include <mach/tegra20-pmc.h>
-static inline void tegra_cpu_lowlevel_setup(void)
-{
- uint32_t r;
-
- /* set the cpu to SVC32 mode */
- __asm__ __volatile__("mrs %0, cpsr":"=r"(r));
- r &= ~0x1f;
- r |= 0xd3;
- __asm__ __volatile__("msr cpsr, %0" : : "r"(r));
-}
-
/* instruct the PMIC to enable the CPU power rail */
static void enable_maincomplex_powerrail(void)
{
@@ -186,13 +175,10 @@ static void maincomplex_powerup(void)
writel(reg, TEGRA_PMC_BASE + PMC_REMOVE_CLAMPING_CMD);
}
}
-void barebox_arm_reset_vector(void)
+void tegra_avp_reset_vector(uint32_t boarddata)
{
int num_cores;
- /* minimal initialization, OK for both ARMv4 and ARMv7 */
- tegra_cpu_lowlevel_setup();
-
/* get the number of cores in the main CPU complex of the current SoC */
num_cores = tegra_get_num_cores();
@@ -205,6 +191,9 @@ void barebox_arm_reset_vector(void)
writel(tegra_maincomplex_entry - get_runtime_offset(),
TEGRA_EXCEPTION_VECTORS_BASE + 0x100);
+ /* put boarddata in scratch reg, for main CPU to fetch after startup */
+ writel(boarddata, TEGRA_PMC_BASE + PMC_SCRATCH(10));
+
/* bring up main CPU complex */
start_cpu0_clocks();
maincomplex_powerup();
diff --git a/arch/arm/mach-tegra/tegra_maincomplex_init.c b/arch/arm/mach-tegra/tegra_maincomplex_init.c
index c485760db0..b3d59abd6b 100644
--- a/arch/arm/mach-tegra/tegra_maincomplex_init.c
+++ b/arch/arm/mach-tegra/tegra_maincomplex_init.c
@@ -19,6 +19,7 @@
#include <asm/barebox-arm-head.h>
#include <asm/barebox-arm.h>
#include <mach/lowlevel.h>
+#include <mach/tegra20-pmc.h>
void tegra_maincomplex_entry(void)
{
@@ -36,5 +37,6 @@ void tegra_maincomplex_entry(void)
unreachable();
}
- barebox_arm_entry(rambase, ramsize, 0);
+ barebox_arm_entry(rambase, ramsize,
+ readl(TEGRA_PMC_BASE + PMC_SCRATCH(10)));
}