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authorLucas Stach <dev@lynxeye.de>2016-01-12 21:06:51 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2016-01-18 08:22:23 +0100
commit20ce1814bf33ed7baeee5736fa0e894c14136df7 (patch)
treeccaf4ce93eda0622d4aae93e2fee82271cecca12 /arch/arm/mach-tegra
parent53a573c0140118ba4e62f45bd17fae5c378805f7 (diff)
downloadbarebox-20ce1814bf33ed7baeee5736fa0e894c14136df7.tar.gz
barebox-20ce1814bf33ed7baeee5736fa0e894c14136df7.tar.xz
ARM: tegra: clean up lowlevel entry
The lowlevel startup function jumps directly to the main cluster if we are already running there. This allows for a significant cleanup of the board startup code by directly using the FDT address available there. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r--arch/arm/mach-tegra/include/mach/lowlevel.h9
-rw-r--r--arch/arm/mach-tegra/tegra_avp_init.c5
-rw-r--r--arch/arm/mach-tegra/tegra_maincomplex_init.c5
3 files changed, 8 insertions, 11 deletions
diff --git a/arch/arm/mach-tegra/include/mach/lowlevel.h b/arch/arm/mach-tegra/include/mach/lowlevel.h
index 0c76b8883c..f70688e029 100644
--- a/arch/arm/mach-tegra/include/mach/lowlevel.h
+++ b/arch/arm/mach-tegra/include/mach/lowlevel.h
@@ -24,6 +24,7 @@
#ifndef __TEGRA_LOWLEVEL_H
#define __TEGRA_LOWLEVEL_H
+#include <asm/barebox-arm.h>
#include <linux/compiler.h>
#include <linux/sizes.h>
#include <io.h>
@@ -244,18 +245,18 @@ void tegra_ll_delay_usec(int delay)
}
/* reset vector for the AVP, to be called from board reset vector */
-void tegra_avp_reset_vector(uint32_t boarddata);
+void tegra_avp_reset_vector(void);
/* reset vector for the main CPU complex */
-void tegra_maincomplex_entry(void);
+void tegra_maincomplex_entry(char *fdt);
static __always_inline
-void tegra_cpu_lowlevel_setup(void)
+void tegra_cpu_lowlevel_setup(char *fdt)
{
uint32_t r;
if (tegra_cpu_is_maincomplex())
- tegra_maincomplex_entry();
+ tegra_maincomplex_entry(fdt - get_runtime_offset());
/* set the cpu to SVC32 mode */
__asm__ __volatile__("mrs %0, cpsr":"=r"(r));
diff --git a/arch/arm/mach-tegra/tegra_avp_init.c b/arch/arm/mach-tegra/tegra_avp_init.c
index 20fcf3f1d1..16dc65be07 100644
--- a/arch/arm/mach-tegra/tegra_avp_init.c
+++ b/arch/arm/mach-tegra/tegra_avp_init.c
@@ -257,14 +257,11 @@ static void tegra_cluster_switch_hp(void)
writel(reg, TEGRA_FLOW_CTRL_BASE + FLOW_CLUSTER_CONTROL);
}
-void tegra_avp_reset_vector(uint32_t boarddata)
+void tegra_avp_reset_vector(void)
{
int num_cores;
unsigned int entry_address = 0;
- /* put boarddata in scratch reg, for main CPU to fetch after startup */
- writel(boarddata, TEGRA_PMC_BASE + PMC_SCRATCH(10));
-
/* we want to bring up the high performance CPU complex */
if (tegra_get_chiptype() >= TEGRA30)
tegra_cluster_switch_hp();
diff --git a/arch/arm/mach-tegra/tegra_maincomplex_init.c b/arch/arm/mach-tegra/tegra_maincomplex_init.c
index 6c6bdf6c15..27bb3363a3 100644
--- a/arch/arm/mach-tegra/tegra_maincomplex_init.c
+++ b/arch/arm/mach-tegra/tegra_maincomplex_init.c
@@ -23,7 +23,7 @@
#include <mach/tegra20-pmc.h>
#include <mach/tegra20-car.h>
-void tegra_maincomplex_entry(void)
+void tegra_maincomplex_entry(char *fdt)
{
uint32_t rambase, ramsize;
enum tegra_chiptype chiptype;
@@ -79,6 +79,5 @@ void tegra_maincomplex_entry(void)
unreachable();
}
- barebox_arm_entry(rambase, ramsize,
- (void *)readl(TEGRA_PMC_BASE + PMC_SCRATCH(10)));
+ barebox_arm_entry(rambase, ramsize, fdt);
}