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authorSascha Hauer <s.hauer@pengutronix.de>2009-07-31 15:13:02 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2009-07-31 15:13:02 +0200
commitecfac0f3025d7e35d791f72475b4547a04743eb0 (patch)
tree573f1c7bcd563f9188429518d786e5e880b1202a /arch/arm
parentdd8087e1f68213de82afc84082f5ef25df49b690 (diff)
parentfeef285639dbc8d909f55f05f28182e199bc8783 (diff)
downloadbarebox-ecfac0f3025d7e35d791f72475b4547a04743eb0.tar.gz
barebox-ecfac0f3025d7e35d791f72475b4547a04743eb0.tar.xz
Merge branch 'docu_update' of octopus:/home/jbe/work/u-boot-v2 into jbe
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/lib/findbit.S4
-rw-r--r--arch/arm/mach-arm.dox31
-rw-r--r--arch/arm/mach-s3c24xx/lowlevel-init.S3
3 files changed, 24 insertions, 14 deletions
diff --git a/arch/arm/lib/findbit.S b/arch/arm/lib/findbit.S
index 30c8a1a62a..7fa93a5d0a 100644
--- a/arch/arm/lib/findbit.S
+++ b/arch/arm/lib/findbit.S
@@ -1,7 +1,3 @@
-/**
- * @file
- * @brief common bitops
- */
/*
* Originally from Linux kernel
* arch/arm/lib/findbit.S
diff --git a/arch/arm/mach-arm.dox b/arch/arm/mach-arm.dox
index 412ce3840f..106aa39df9 100644
--- a/arch/arm/mach-arm.dox
+++ b/arch/arm/mach-arm.dox
@@ -6,7 +6,7 @@
FIXME
-@par What's happens when the reset signal is gone
+@section mach_arm_reset What's happens when the reset signal is gone
@note Code running immediately after reset runs at an address it is not linked
to: "runtime address != link address". You should only use branches and
@@ -22,29 +22,44 @@ After handling some MMU related things \<board_init_lowlevel\> can be called (if
not disabled). This is a board specific function for SDRAM setup for example.
As its board specific, your can do whatever you need to bring your board up.
+In the case the boot happens from NAND flash memory, further steps are required.
+Most of the known processor devices are reading the first few blocks from the
+NAND flash memory into some kind of internal SRAM. This small part must be able
+to initialize the SDRAM controller and to read the remaining rest of the
+U-Boot-v2 binary from the NAND flash memory prior returning from \<board_init_lowlevel\>.
+
When \<board_init_lowlevel\> returns it will be assumed there is now a working
RAM that can be used for all further steps.
-Next step is relocation of U-Boot itself. It gets copied to RAM and the last
-assembler instruction is a jump into \<start_uboot\>. This target address is
-the first C instruction in U-Boot. At this point of time:\n
+Next step is relocation of U-Boot itself (if not already done). It gets copied
+to RAM and the last assembler instruction is a jump into start_uboot(). This
+target address is the first C instruction in U-Boot. At this point of time:\n
"runtime address == link address".
-@par Architectures using ARM processors
-For details on specific architectures:
- - @subpage dev_omap_arch
-
@section mach_arm_files List of changes
Lets call the new MACH new_cpu.
- create a new subdirectory in /arch/arm/new_cpu
+ - create a new subdirectory in /include/asm-arm/new_cpu
+ - add CPU specific definitions into /include/asm-arm/new_cpu/
- add /arch/arm/new_cpu/Kconfig
- add /arch/arm/new_cpu/Makfile
- add other CPU specific code into /arch/arm/new_cpu/
- modify /arch/arm/Kconfig
- modify /arch/arm/Makfile
+@section mach_arm_architecures Architectures using ARM processors
+For details on specific architectures:
+
+@subsection mach_arm_omap_info OMAP CPUs
+
+@li @subpage dev_omap_arch
+
+@subsection mach_arm_s3c24xx_info S3C24XX CPUs
+
+@li @subpage dev_s3c24xx_arch
+
TODO add more details
*/
diff --git a/arch/arm/mach-s3c24xx/lowlevel-init.S b/arch/arm/mach-s3c24xx/lowlevel-init.S
index 8c32f50508..d27cfa5dfb 100644
--- a/arch/arm/mach-s3c24xx/lowlevel-init.S
+++ b/arch/arm/mach-s3c24xx/lowlevel-init.S
@@ -162,8 +162,7 @@ Define in the machine specific config.h the following symbols:
@note Valid values for the PLL settings can be found in the CPU manual.
-@par Background: PLL frequency calculation for the S3C2410 CPU (both PLLs)
-and S3C2440 (UPLL only)
+@par Background: PLL frequency calculation for the S3C2410 CPU (both PLLs) and S3C2440 (UPLL only)
@f[
f_{PLL} = \frac{m * f_{Ref}}{p * 2^s}