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authorYegor Yefremov <yegorslists@googlemail.com>2016-12-09 15:17:14 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2017-01-10 08:27:33 +0100
commitd38502157806dc1a9e4afc5061747f0eb160491c (patch)
tree187d7fe5d225efa9a301005535c93156c996d6f5 /arch/arm
parent5e887fa7a76fbb6887f7d6825bb4f879dec9916c (diff)
downloadbarebox-d38502157806dc1a9e4afc5061747f0eb160491c.tar.gz
barebox-d38502157806dc1a9e4afc5061747f0eb160491c.tar.xz
arm: am33xx: add reset duration control register address definition
PRM_RSTTIME register provides settings for global and power domain reset durations. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-omap/include/mach/am33xx-silicon.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-omap/include/mach/am33xx-silicon.h b/arch/arm/mach-omap/include/mach/am33xx-silicon.h
index e17e609879..10595d5ee7 100644
--- a/arch/arm/mach-omap/include/mach/am33xx-silicon.h
+++ b/arch/arm/mach-omap/include/mach/am33xx-silicon.h
@@ -71,6 +71,7 @@
#define AM33XX_PRM_RSTCTRL (AM33XX_PRM_BASE + 0x0f00)
#define AM33XX_PRM_RSTCTRL_RESET 0x1
+#define AM33XX_PRM_RSTTIME (AM33XX_PRM_BASE + 0x0f04)
#define AM33XX_PRM_RSTST (AM33XX_PRM_BASE + 0x0f08)
/* CTRL */