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author | Sascha Hauer <s.hauer@pengutronix.de> | 2020-10-14 12:46:52 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-10-14 12:46:52 +0200 |
commit | 2aa7ff0ae2bf2db33e358f18bec5a0239d244aa5 (patch) | |
tree | 9417d44f527a5ed3876ff651946cc0a15f658e87 /arch/arm | |
parent | 3b9ce49e17897cc053ed8416685e79902d7432a1 (diff) | |
parent | 764941b17e53e40dd1df1ac3137ebc825d5d6480 (diff) | |
download | barebox-2aa7ff0ae2bf2db33e358f18bec5a0239d244aa5.tar.gz barebox-2aa7ff0ae2bf2db33e358f18bec5a0239d244aa5.tar.xz |
Merge branch 'for-next/reboot-mode' into master
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/dts/imx6qdl.dtsi | 21 | ||||
-rw-r--r-- | arch/arm/dts/stm32mp151.dtsi | 15 | ||||
-rw-r--r-- | arch/arm/mach-stm32mp/include/mach/bootsource.h | 12 | ||||
-rw-r--r-- | arch/arm/mach-stm32mp/init.c | 16 |
4 files changed, 38 insertions, 26 deletions
diff --git a/arch/arm/dts/imx6qdl.dtsi b/arch/arm/dts/imx6qdl.dtsi index 828be9ce0d..c3e02d2117 100644 --- a/arch/arm/dts/imx6qdl.dtsi +++ b/arch/arm/dts/imx6qdl.dtsi @@ -6,5 +6,26 @@ pwm2 = &pwm3; pwm3 = &pwm4; ipu0 = &ipu1; + gpr.reboot_mode = &reboot_mode_gpr; + }; +}; + +&src { + compatible = "fsl,imx6q-src", "fsl,imx51-src", "syscon", "simple-mfd"; + + reboot_mode_gpr: reboot-mode { + compatible = "barebox,syscon-reboot-mode"; + offset = <0x40>, <0x44>; /* SRC_GPR{9,10} */ + mask = <0xffffffff>, <0x10000000>; + mode-normal = <0>, <0>; + mode-serial = <0x00000010>, <0x10000000>; + mode-spi0-0 = <0x08000030>, <0x10000000>; + mode-spi0-1 = <0x18000030>, <0x10000000>; + mode-spi0-2 = <0x28000030>, <0x10000000>; + mode-spi0-3 = <0x38000030>, <0x10000000>; + mode-mmc0 = <0x00002040>, <0x10000000>; + mode-mmc1 = <0x00002840>, <0x10000000>; + mode-mmc2 = <0x00003040>, <0x10000000>; + mode-mmc3 = <0x00003840>, <0x10000000>; }; }; diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi index cc25400475..ca11492de5 100644 --- a/arch/arm/dts/stm32mp151.dtsi +++ b/arch/arm/dts/stm32mp151.dtsi @@ -28,6 +28,7 @@ pwm15 = &{/soc/timer@44006000/pwm}; pwm16 = &{/soc/timer@44007000/pwm}; pwm17 = &{/soc/timer@44008000/pwm}; + tamp.reboot_mode = &reboot_mode_tamp; }; }; @@ -42,6 +43,20 @@ compatible = "st,stm32mp1-ddr"; reg = <0x5a003000 0x1000>; }; + + tamp@5c00a000 { + compatible = "simple-bus", "syscon", "simple-mfd"; + reg = <0x5c00a000 0x400>; + + reboot_mode_tamp: reboot-mode { + compatible = "syscon-reboot-mode"; + offset = <0x150>; /* reg20 */ + mask = <0xff>; + mode-normal = <0>; + mode-loader = <0xBB>; + mode-recovery = <0xBC>; + }; + }; }; &bsec { diff --git a/arch/arm/mach-stm32mp/include/mach/bootsource.h b/arch/arm/mach-stm32mp/include/mach/bootsource.h index 1b6f562ac3..5750dc1448 100644 --- a/arch/arm/mach-stm32mp/include/mach/bootsource.h +++ b/arch/arm/mach-stm32mp/include/mach/bootsource.h @@ -18,16 +18,4 @@ enum stm32mp_boot_device { STM32MP_BOOT_SERIAL_USB_OTG = 0x62, }; -enum stm32mp_forced_boot_mode { - STM32MP_BOOT_NORMAL = 0x00, - STM32MP_BOOT_FASTBOOT = 0x01, - STM32MP_BOOT_RECOVERY = 0x02, - STM32MP_BOOT_STM32PROG = 0x03, - STM32MP_BOOT_UMS_MMC0 = 0x10, - STM32MP_BOOT_UMS_MMC1 = 0x11, - STM32MP_BOOT_UMS_MMC2 = 0x12, -}; - -enum stm32mp_forced_boot_mode st32mp_get_forced_boot_mode(void); - #endif diff --git a/arch/arm/mach-stm32mp/init.c b/arch/arm/mach-stm32mp/init.c index e77e99f8fa..01961ae456 100644 --- a/arch/arm/mach-stm32mp/init.c +++ b/arch/arm/mach-stm32mp/init.c @@ -60,12 +60,6 @@ #define FIXUP_CPU_NUM(mask) ((mask) >> 16) #define FIXUP_CPU_HZ(mask) (((mask) & GENMASK(15, 0)) * 1000UL * 1000UL) -static enum stm32mp_forced_boot_mode __stm32mp_forced_boot_mode; -enum stm32mp_forced_boot_mode st32mp_get_forced_boot_mode(void) -{ - return __stm32mp_forced_boot_mode; -} - static void setup_boot_mode(void) { u32 boot_ctx = readl(TAMP_BOOT_CONTEXT); @@ -101,17 +95,11 @@ static void setup_boot_mode(void) break; } - __stm32mp_forced_boot_mode = boot_ctx & TAMP_BOOT_FORCED_MASK; - - pr_debug("[boot_ctx=0x%x] => mode=0x%x, instance=%d forced=0x%x\n", - boot_ctx, boot_mode, instance, __stm32mp_forced_boot_mode); + pr_debug("[boot_ctx=0x%x] => mode=0x%x, instance=%d\n", + boot_ctx, boot_mode, instance); bootsource_set(src); bootsource_set_instance(instance); - - /* clear TAMP for next reboot */ - clrsetbits_le32(TAMP_BOOT_CONTEXT, TAMP_BOOT_FORCED_MASK, - STM32MP_BOOT_NORMAL); } static int __stm32mp_cputype; |