Merge branch 'for-next/misc' into master

25 files changed, 196 insertions, 122 deletions

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 5438236af4..a02d80d2da 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -132,7 +132,7 @@ obj-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC)	+= terasic-de0-nano-soc/
 obj-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT)	+= terasic-sockit/
 obj-$(CONFIG_MACH_SOLIDRUN_CUBOX)		+= solidrun-cubox/
 obj-$(CONFIG_MACH_SOLIDRUN_MICROSOM)		+= solidrun-microsom/
-obj-$(CONFIG_MACH_STM32MP157C_DK2)		+= stm32mp157c-dk2/
+obj-$(CONFIG_MACH_STM32MP15XX_DKX)		+= stm32mp15xx-dkx/
 obj-$(CONFIG_MACH_LXA_MC1)			+= lxa-mc1/
 obj-$(CONFIG_MACH_TECHNEXION_PICO_HOBBIT)	+= technexion-pico-hobbit/
 obj-$(CONFIG_MACH_TECHNEXION_WANDBOARD)		+= technexion-wandboard/
diff --git a/arch/arm/boards/lxa-mc1/board.c b/arch/arm/boards/lxa-mc1/board.c
index 7f1f3ccd7e..9126973dcb 100644
--- a/arch/arm/boards/lxa-mc1/board.c
+++ b/arch/arm/boards/lxa-mc1/board.c
@@ -28,11 +28,9 @@ static int of_fixup_regulator_supply_disable(struct device_node *root, void *pat
 	return 0;
 }
 
-static int mc1_device_init(void)
+static int mc1_probe(struct device_d *dev)
 {
 	int flags;
-	if (!of_machine_is_compatible("lxa,stm32mp157c-mc1"))
-		return 0;
 
 	flags = bootsource_get_instance() == 0 ? BBU_HANDLER_FLAG_DEFAULT : 0;
 	stm32mp_bbu_mmc_register_handler("sd", "/dev/mmc0.ssbl", flags);
@@ -55,4 +53,15 @@ static int mc1_device_init(void)
 	 */
 	return of_register_fixup(of_fixup_regulator_supply_disable, "/regulator_3v3");
 }
-device_initcall(mc1_device_init);
+
+static const struct of_device_id mc1_of_match[] = {
+	{ .compatible = "lxa,stm32mp157c-mc1" },
+	{ /* sentinel */ },
+};
+
+static struct driver_d mc1_board_driver = {
+	.name = "board-lxa-mc1",
+	.probe = mc1_probe,
+	.of_compatible = mc1_of_match,
+};
+device_platform_driver(mc1_board_driver);
diff --git a/arch/arm/boards/seeed-odyssey/board.c b/arch/arm/boards/seeed-odyssey/board.c
index e3fe536873..8c011898a3 100644
--- a/arch/arm/boards/seeed-odyssey/board.c
+++ b/arch/arm/boards/seeed-odyssey/board.c
@@ -7,14 +7,11 @@
 #include <bootsource.h>
 #include <of.h>
 
-static int odyssey_device_init(void)
+static int odyssey_som_probe(struct device_d *dev)
 {
 	int flags;
 	int instance = bootsource_get_instance();
 
-	if (!of_machine_is_compatible("seeed,stm32mp157c-odyssey-som"))
-		return 0;
-
 	flags = instance == 0 ? BBU_HANDLER_FLAG_DEFAULT : 0;
 	stm32mp_bbu_mmc_register_handler("sd", "/dev/mmc0.ssbl", flags);
 
@@ -29,4 +26,15 @@ static int odyssey_device_init(void)
 
 	return 0;
 }
-device_initcall(odyssey_device_init);
+
+static const struct of_device_id odyssey_som_of_match[] = {
+	{ .compatible = "seeed,stm32mp157c-odyssey-som" },
+	{ /* sentinel */ },
+};
+
+static struct driver_d odyssey_som_driver = {
+	.name = "odyssey-som",
+	.probe = odyssey_som_probe,
+	.of_compatible = odyssey_som_of_match,
+};
+device_platform_driver(odyssey_som_driver);
diff --git a/arch/arm/boards/stm32mp157c-dk2/board.c b/arch/arm/boards/stm32mp157c-dk2/board.c
deleted file mode 100644
index 4636603121..0000000000
--- a/arch/arm/boards/stm32mp157c-dk2/board.c
+++ /dev/null
@@ -1,18 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
-#include <init.h>
-#include <mach/bbu.h>
-
-static int dk2_postcore_init(void)
-{
-	if (!of_machine_is_compatible("st,stm32mp157c-dk2"))
-		return 0;
-
-	stm32mp_bbu_mmc_register_handler("sd", "/dev/mmc0.ssbl",
-					 BBU_HANDLER_FLAG_DEFAULT);
-
-	barebox_set_model("STM32MP157C-DK2");
-
-	return 0;
-}
-postcore_initcall(dk2_postcore_init);
diff --git a/arch/arm/boards/stm32mp157c-dk2/lowlevel.c b/arch/arm/boards/stm32mp157c-dk2/lowlevel.c
deleted file mode 100644
index 7261d7a8bc..0000000000
--- a/arch/arm/boards/stm32mp157c-dk2/lowlevel.c
+++ /dev/null
@@ -1,26 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
-#include <mach/entry.h>
-#include <debug_ll.h>
-
-extern char __dtb_z_stm32mp157c_dk2_start[];
-
-static void setup_uart(void)
-{
-	/* first stage has set up the UART, so nothing to do here */
-	putc_ll('>');
-}
-
-ENTRY_FUNCTION(start_stm32mp157c_dk2, r0, r1, r2)
-{
-	void *fdt;
-
-	stm32mp_cpu_lowlevel_init();
-
-	if (IS_ENABLED(CONFIG_DEBUG_LL))
-		setup_uart();
-
-	fdt = __dtb_z_stm32mp157c_dk2_start + get_runtime_offset();
-
-	stm32mp1_barebox_entry(fdt);
-}
diff --git a/arch/arm/boards/stm32mp157c-dk2/Makefile b/arch/arm/boards/stm32mp15xx-dkx/Makefile
index 092c31d6b2..092c31d6b2 100644
--- a/arch/arm/boards/stm32mp157c-dk2/Makefile
+++ b/arch/arm/boards/stm32mp15xx-dkx/Makefile
diff --git a/arch/arm/boards/stm32mp15xx-dkx/board.c b/arch/arm/boards/stm32mp15xx-dkx/board.c
new file mode 100644
index 0000000000..1ddfee698d
--- /dev/null
+++ b/arch/arm/boards/stm32mp15xx-dkx/board.c
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0+
+#include <common.h>
+#include <init.h>
+#include <mach/bbu.h>
+
+static int dkx_probe(struct device_d *dev)
+{
+	const void *model;
+
+	stm32mp_bbu_mmc_register_handler("sd", "/dev/mmc0.ssbl",
+					 BBU_HANDLER_FLAG_DEFAULT);
+
+	if (dev_get_drvdata(dev, &model) == 0)
+		barebox_set_model(model);
+
+	barebox_set_hostname("stm32mp15xx-dkx");
+
+	return 0;
+}
+
+static const struct of_device_id dkx_of_match[] = {
+	{ .compatible = "st,stm32mp157a-dk1", .data = "STM32MP157A-DK1" },
+	{ .compatible = "st,stm32mp157c-dk2", .data = "STM32MP157C-DK2" },
+	{ /* sentinel */ },
+};
+
+static struct driver_d dkx_board_driver = {
+	.name = "board-stm32mp15xx-dkx",
+	.probe = dkx_probe,
+	.of_compatible = dkx_of_match,
+};
+postcore_platform_driver(dkx_board_driver);
diff --git a/arch/arm/boards/stm32mp15xx-dkx/lowlevel.c b/arch/arm/boards/stm32mp15xx-dkx/lowlevel.c
new file mode 100644
index 0000000000..65f4bbb4da
--- /dev/null
+++ b/arch/arm/boards/stm32mp15xx-dkx/lowlevel.c
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: GPL-2.0+
+#include <common.h>
+#include <mach/entry.h>
+#include <debug_ll.h>
+#include <mach/revision.h>
+
+extern char __dtb_z_stm32mp157c_dk2_start[];
+extern char __dtb_z_stm32mp157a_dk1_start[];
+
+static void setup_uart(void)
+{
+	/* first stage has set up the UART, so nothing to do here */
+	putc_ll('>');
+}
+
+ENTRY_FUNCTION(start_stm32mp15xx_dkx, r0, r1, r2)
+{
+	void *fdt;
+	u32 cputype;
+	int err;
+
+	stm32mp_cpu_lowlevel_init();
+
+	if (IS_ENABLED(CONFIG_DEBUG_LL))
+		setup_uart();
+
+	err = __stm32mp_get_cpu_type(&cputype);
+	if (!err && cputype == CPU_STM32MP157Axx)
+		fdt = __dtb_z_stm32mp157a_dk1_start;
+	else
+		fdt = __dtb_z_stm32mp157c_dk2_start;
+
+	stm32mp1_barebox_entry(fdt + get_runtime_offset());
+}
diff --git a/arch/arm/configs/stm32mp_defconfig b/arch/arm/configs/stm32mp_defconfig
index 92bdf5b040..e9f89e69d9 100644
--- a/arch/arm/configs/stm32mp_defconfig
+++ b/arch/arm/configs/stm32mp_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARCH_STM32MP=y
-CONFIG_MACH_STM32MP157C_DK2=y
+CONFIG_MACH_STM32MP15XX_DKX=y
 CONFIG_MACH_LXA_MC1=y
 CONFIG_MACH_SEEED_ODYSSEY=y
 CONFIG_THUMB2_BAREBOX=y
@@ -12,7 +12,6 @@ CONFIG_MALLOC_TLSF=y
 CONFIG_KALLSYMS=y
 CONFIG_RELOCATABLE=y
 CONFIG_HUSH_FANCY_PROMPT=y
-CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
 CONFIG_MENU=y
 CONFIG_BOOTM_SHOW_TYPE=y
@@ -24,10 +23,14 @@ CONFIG_BLSPEC=y
 CONFIG_CONSOLE_ACTIVATE_NONE=y
 CONFIG_CONSOLE_ALLOW_COLOR=y
 CONFIG_PBL_CONSOLE=y
+CONFIG_CONSOLE_RATP=y
+CONFIG_RATP_CMD_I2C=y
+CONFIG_RATP_CMD_GPIO=y
 CONFIG_PARTITION_DISK_EFI=y
 # CONFIG_PARTITION_DISK_EFI_GPT_NO_FORCE is not set
 # CONFIG_PARTITION_DISK_EFI_GPT_COMPARE is not set
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW_REBOOT_MODE=y
 CONFIG_RESET_SOURCE=y
 CONFIG_CMD_DMESG=y
 CONFIG_LONGHELP=y
@@ -83,10 +86,12 @@ CONFIG_CMD_BAREBOX_UPDATE=y
 CONFIG_CMD_OF_DIFF=y
 CONFIG_CMD_OF_NODE=y
 CONFIG_CMD_OF_PROPERTY=y
+CONFIG_CMD_OF_OVERLAY=y
 CONFIG_CMD_OFTREE=y
 CONFIG_CMD_TIME=y
 CONFIG_NET=y
 CONFIG_NET_NETCONSOLE=y
+CONFIG_NET_FASTBOOT=y
 CONFIG_OFDEVICE=y
 CONFIG_OF_BAREBOX_DRIVERS=y
 CONFIG_DRIVER_SERIAL_STM32=y
@@ -111,6 +116,7 @@ CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_LED_PWM=y
 CONFIG_LED_GPIO_OF=y
+CONFIG_LED_TRIGGERS=y
 CONFIG_EEPROM_AT24=y
 CONFIG_KEYBOARD_GPIO=y
 CONFIG_INPUT_SPECIALKEYS=y
@@ -132,11 +138,17 @@ CONFIG_STM32_REMOTEPROC=y
 CONFIG_RESET_STM32=y
 CONFIG_GENERIC_PHY=y
 CONFIG_PHY_STM32_USBPHYC=y
+CONFIG_SYSCON_REBOOT_MODE=y
 CONFIG_FS_EXT4=y
 CONFIG_FS_TFTP=y
 CONFIG_FS_NFS=y
 CONFIG_FS_FAT=y
 CONFIG_FS_FAT_WRITE=y
 CONFIG_FS_FAT_LFN=y
+CONFIG_FS_PSTORE=y
+CONFIG_FS_PSTORE_CONSOLE=y
+CONFIG_FS_PSTORE_RAMOOPS=y
+CONFIG_FS_SQUASHFS=y
+CONFIG_FS_RATP=y
 CONFIG_ZLIB=y
 CONFIG_CRC8=y
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index bd53d68211..a1e0bb6a41 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -111,7 +111,7 @@ lwl-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += imx6dl-hummingboard.dtb.o imx6q-hummingb
 				imx6dl-hummingboard2.dtb.o imx6q-hummingboard2.dtb.o \
 				imx6q-h100.dtb.o
 lwl-$(CONFIG_MACH_SEEED_ODYSSEY) += stm32mp157c-odyssey.dtb.o
-lwl-$(CONFIG_MACH_STM32MP157C_DK2) += stm32mp157c-dk2.dtb.o
+lwl-$(CONFIG_MACH_STM32MP15XX_DKX) += stm32mp157c-dk2.dtb.o stm32mp157a-dk1.dtb.o
 lwl-$(CONFIG_MACH_LXA_MC1) += stm32mp157c-lxa-mc1.dtb.o
 lwl-$(CONFIG_MACH_SCB9328) += imx1-scb9328.dtb.o
 lwl-$(CONFIG_MACH_TECHNEXION_WANDBOARD) += imx6q-wandboard.dtb.o imx6dl-wandboard.dtb.o
diff --git a/arch/arm/dts/am335x-boneblack.dts b/arch/arm/dts/am335x-boneblack.dts
index 80d710b924..c06a532e48 100644
--- a/arch/arm/dts/am335x-boneblack.dts
+++ b/arch/arm/dts/am335x-boneblack.dts
@@ -85,3 +85,13 @@
 		status = "okay";
 	};
 };
+
+&tscadc {
+	status = "okay";
+	adc {
+		/* Ch 0-6 are on connector P9.	Ch 7 measures the 3.3V rail
+		 * divided by 2 (e.g., it should read 1650).
+		 */
+		ti,adc-channels = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>;
+	};
+};
diff --git a/arch/arm/dts/stm32mp157a-dk1.dts b/arch/arm/dts/stm32mp157a-dk1.dts
index f2cafae66b..7a907cc314 100644
--- a/arch/arm/dts/stm32mp157a-dk1.dts
+++ b/arch/arm/dts/stm32mp157a-dk1.dts
@@ -5,4 +5,4 @@
  */
 
 #include <arm/stm32mp157a-dk1.dts>
-#include "stm32mp157a-dk1.dtsi"
+#include "stm32mp15xx-dkx.dtsi"
diff --git a/arch/arm/dts/stm32mp157c-dk2.dts b/arch/arm/dts/stm32mp157c-dk2.dts
index 6e73162ea4..98525abd71 100644
--- a/arch/arm/dts/stm32mp157c-dk2.dts
+++ b/arch/arm/dts/stm32mp157c-dk2.dts
@@ -5,4 +5,4 @@
  */
 
 #include <arm/stm32mp157c-dk2.dts>
-#include "stm32mp157a-dk1.dtsi"
+#include "stm32mp15xx-dkx.dtsi"
diff --git a/arch/arm/dts/stm32mp157a-dk1.dtsi b/arch/arm/dts/stm32mp15xx-dkx.dtsi
index 173e64e04c..173e64e04c 100644
--- a/arch/arm/dts/stm32mp157a-dk1.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dkx.dtsi
diff --git a/arch/arm/mach-at91/at91_pmc_ll.c b/arch/arm/mach-at91/at91_pmc_ll.c
index 9205322db9..e561f20755 100644
--- a/arch/arm/mach-at91/at91_pmc_ll.c
+++ b/arch/arm/mach-at91/at91_pmc_ll.c
@@ -88,6 +88,8 @@ void at91_pmc_init(void __iomem *pmc_base, unsigned int flags)
 		tmp &= ~AT91_PMC_OSCBYPASS;
 		tmp &= ~AT91_PMC_KEY_MASK;
 		tmp |= AT91_PMC_KEY;
+		if (flags & AT91_PMC_LL_FLAG_MCK_BYPASS)
+			tmp |= AT91_PMC_OSCBYPASS;
 		at91_pmc_write(AT91_CKGR_MOR, tmp);
 
 		tmp = at91_pmc_read(AT91_CKGR_MOR);
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc_ll.h b/arch/arm/mach-at91/include/mach/at91_pmc_ll.h
index 6ec3ae0852..85896a01d5 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc_ll.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc_ll.h
@@ -16,6 +16,7 @@
 #define AT91_PMC_LL_FLAG_H32MXDIV	(1 << 3)
 #define AT91_PMC_LL_FLAG_PMC_UTMI	(1 << 4)
 #define AT91_PMC_LL_FLAG_GCSR		(1 << 5)
+#define AT91_PMC_LL_FLAG_MCK_BYPASS	(1 << 6)
 
 #define AT91_PMC_LL_AT91RM9200	(0)
 #define AT91_PMC_LL_AT91SAM9260	(0)
@@ -30,6 +31,10 @@
 #define AT91_PMC_LL_SAMA5D2	(AT91_PMC_LL_FLAG_SAM9X5_PMC | \
 				 AT91_PMC_LL_FLAG_MEASURE_XTAL | \
 				 AT91_PMC_LL_FLAG_PMC_UTMI)
+/* This assumes a crystal on both XIN and XOUT. If your board
+ * instead has an extenal oscillator on XIN only,
+ * AT91_PMC_LL_FLAG_MCK_BYPASS needs to be OR`ed in as well
+ */
 #define AT91_PMC_LL_SAMA5D3	(AT91_PMC_LL_FLAG_SAM9X5_PMC | \
 				 AT91_PMC_LL_FLAG_DISABLE_RC | \
 				 AT91_PMC_LL_FLAG_PMC_UTMI)
diff --git a/arch/arm/mach-at91/include/mach/at91_wdt.h b/arch/arm/mach-at91/include/mach/at91_wdt.h
index d295d35d1b..04924742a5 100644
--- a/arch/arm/mach-at91/include/mach/at91_wdt.h
+++ b/arch/arm/mach-at91/include/mach/at91_wdt.h
@@ -41,7 +41,7 @@
  * Copyright (c) 2006, Atmel Corporation
  */
 
-#include <asm-generic/io.h>
+#include <asm/io.h>
 
 static inline void at91_wdt_disable(void __iomem *wdt_base)
 {
diff --git a/arch/arm/mach-omap/am33xx_clock.c b/arch/arm/mach-omap/am33xx_clock.c
index 0a49038270..8fa2c70aa2 100644
--- a/arch/arm/mach-omap/am33xx_clock.c
+++ b/arch/arm/mach-omap/am33xx_clock.c
@@ -165,6 +165,10 @@ void am33xx_enable_per_clocks(void)
 	__raw_writel(PRCM_MOD_EN, CM_PER_USB0_CLKCTRL);
 	while ((__raw_readl(CM_PER_USB0_CLKCTRL) & 0x30000) != 0x0);
 
+	/* TSC & ADC */
+	__raw_writel(PRCM_MOD_EN, CM_WKUP_ADC_TSC_CLKCTRL);
+	while (__raw_readl(CM_WKUP_ADC_TSC_CLKCTRL) != PRCM_MOD_EN);
+
 	clkdcoldo = __raw_readl(CM_CLKDCOLDO_DPLL_PER);
 	clkdcoldo = clkdcoldo | 0x100;
 	__raw_writel(clkdcoldo, CM_CLKDCOLDO_DPLL_PER);
diff --git a/arch/arm/mach-omap/boot_order.c b/arch/arm/mach-omap/boot_order.c
index db22513bde..4b74fdba66 100644
--- a/arch/arm/mach-omap/boot_order.c
+++ b/arch/arm/mach-omap/boot_order.c
@@ -70,13 +70,13 @@ static int cmd_boot_order(int argc, char *argv[])
 }
 
 BAREBOX_CMD_HELP_START(boot_order)
-BAREBOX_CMD_HELP_TEXT("Set warm boot order of up to four devices. Each device can be one of:")
+BAREBOX_CMD_HELP_TEXT("Set OMAP warm boot order of up to four devices. Each device can be one of:")
 BAREBOX_CMD_HELP_TEXT("xip xipwait nand onenand mmc1 mmc2_1 mmc2_2 uart usb_1 usb_ulpi usb_2")
 BAREBOX_CMD_HELP_END
 
 BAREBOX_CMD_START(boot_order)
 	.cmd		= cmd_boot_order,
-	BAREBOX_CMD_DESC("set warm boot order")
+	BAREBOX_CMD_DESC("set OMAP warm boot order")
 	BAREBOX_CMD_OPTS("DEVICE...")
 	BAREBOX_CMD_GROUP(CMD_GRP_BOOT)
 	BAREBOX_CMD_HELP(cmd_boot_order_help)
diff --git a/arch/arm/mach-omap/include/mach/am33xx-clock.h b/arch/arm/mach-omap/include/mach/am33xx-clock.h
index 284d5f8cf6..e71ecbcd24 100644
--- a/arch/arm/mach-omap/include/mach/am33xx-clock.h
+++ b/arch/arm/mach-omap/include/mach/am33xx-clock.h
@@ -138,6 +138,7 @@
 #define CM_PER_I2C1_CLKCTRL             (CM_PER + 0x48) /* I2C1 */
 #define CM_PER_I2C2_CLKCTRL             (CM_PER + 0x44) /* I2C2 */
 #define CM_WKUP_GPIO0_CLKCTRL           (CM_WKUP + 0x8) /* GPIO0 */
+#define CM_WKUP_ADC_TSC_CLKCTRL         (CM_WKUP + 0xbc)/* TSCADC */
 
 #define CM_PER_MMC0_CLKCTRL             (CM_PER + 0x3C)
 #define CM_PER_MMC1_CLKCTRL             (CM_PER + 0xF4)
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
index f064a38088..b8ccbaab67 100644
--- a/arch/arm/mach-stm32mp/Kconfig
+++ b/arch/arm/mach-stm32mp/Kconfig
@@ -8,9 +8,12 @@ config ARCH_STM32MP157
 	select ARM_PSCI_CLIENT
 	bool
 
-config MACH_STM32MP157C_DK2
+config MACH_STM32MP15XX_DKX
 	select ARCH_STM32MP157
-	bool "STM32MP157C-DK2 board"
+	bool "STM32MP157 DK1 and DK2 boards"
+	help
+	  builds a single barebox-stm32mp15xx-dkx.img that can be deployed
+	  as SSBL on both the stm32mp157a-dk1 and stm32mp157c-dk2
 
 config MACH_LXA_MC1
 	select ARCH_STM32MP157
diff --git a/arch/arm/mach-stm32mp/include/mach/revision.h b/arch/arm/mach-stm32mp/include/mach/revision.h
index 2eb4d44b33..2ef8ef30c3 100644
--- a/arch/arm/mach-stm32mp/include/mach/revision.h
+++ b/arch/arm/mach-stm32mp/include/mach/revision.h
@@ -6,6 +6,9 @@
 #ifndef __MACH_CPUTYPE_H__
 #define __MACH_CPUTYPE_H__
 
+#include <mach/bsec.h>
+#include <asm/io.h>
+#include <mach/stm32.h>
 
 /* ID = Device Version (bit31:16) + Device Part Number (RPN) (bit7:0)
  * 157X: 2x Cortex-A7, Cortex-M4, CAN FD, GPU, DSI
@@ -45,4 +48,52 @@ int stm32mp_package(void);
 #define cpu_is_stm32mp151c() (stm32mp_cputype() == CPU_STM32MP151Cxx)
 #define cpu_is_stm32mp151a() (stm32mp_cputype() == CPU_STM32MP151Axx)
 
+/* DBGMCU register */
+#define DBGMCU_APB4FZ1		(STM32_DBGMCU_BASE + 0x2C)
+#define DBGMCU_IDC		(STM32_DBGMCU_BASE + 0x00)
+#define DBGMCU_IDC_DEV_ID_MASK	GENMASK(11, 0)
+#define DBGMCU_IDC_DEV_ID_SHIFT	0
+#define DBGMCU_IDC_REV_ID_MASK	GENMASK(31, 16)
+#define DBGMCU_IDC_REV_ID_SHIFT	16
+
+#define RCC_DBGCFGR		(STM32_RCC_BASE + 0x080C)
+#define RCC_DBGCFGR_DBGCKEN	BIT(8)
+
+/* BSEC OTP index */
+#define BSEC_OTP_RPN	1
+#define BSEC_OTP_PKG	16
+
+/* Device Part Number (RPN) = OTP_DATA1 lower 8 bits */
+#define RPN_SHIFT	0
+#define RPN_MASK	GENMASK(7, 0)
+
+static inline u32 stm32mp_read_idc(void)
+{
+	setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN);
+	return readl(IOMEM(DBGMCU_IDC));
+}
+
+/* Get Device Part Number (RPN) from OTP */
+static inline int __stm32mp_get_cpu_rpn(u32 *rpn)
+{
+	int ret = bsec_read_field(BSEC_OTP_RPN, rpn);
+	if (ret)
+		return ret;
+
+	*rpn = (*rpn >> RPN_SHIFT) & RPN_MASK;
+	return 0;
+}
+
+static inline int __stm32mp_get_cpu_type(u32 *type)
+{
+	u32 id;
+	int ret = __stm32mp_get_cpu_rpn(type);
+	if (ret)
+		return ret;
+
+	id = (stm32mp_read_idc() & DBGMCU_IDC_DEV_ID_MASK) >> DBGMCU_IDC_DEV_ID_SHIFT;
+	*type |= id << 16;
+	return 0;
+}
+
 #endif /* __MACH_CPUTYPE_H__ */
diff --git a/arch/arm/mach-stm32mp/init.c b/arch/arm/mach-stm32mp/init.c
index 7f687fa4f2..e77e99f8fa 100644
--- a/arch/arm/mach-stm32mp/init.c
+++ b/arch/arm/mach-stm32mp/init.c
@@ -15,26 +15,6 @@
 #include <bootsource.h>
 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
 
-/* DBGMCU register */
-#define DBGMCU_IDC		(STM32_DBGMCU_BASE + 0x00)
-#define DBGMCU_APB4FZ1		(STM32_DBGMCU_BASE + 0x2C)
-#define DBGMCU_APB4FZ1_IWDG2	BIT(2)
-#define DBGMCU_IDC_DEV_ID_MASK	GENMASK(11, 0)
-#define DBGMCU_IDC_DEV_ID_SHIFT	0
-#define DBGMCU_IDC_REV_ID_MASK	GENMASK(31, 16)
-#define DBGMCU_IDC_REV_ID_SHIFT	16
-
-#define RCC_DBGCFGR		(STM32_RCC_BASE + 0x080C)
-#define RCC_DBGCFGR_DBGCKEN	BIT(8)
-
-/* BSEC OTP index */
-#define BSEC_OTP_RPN	1
-#define BSEC_OTP_PKG	16
-
-/* Device Part Number (RPN) = OTP_DATA1 lower 8 bits */
-#define RPN_SHIFT	0
-#define RPN_MASK	GENMASK(7, 0)
-
 /* Package = bit 27:29 of OTP16
  * - 100: LBGA448  (FFI) => AA = LFBGA 18x18mm 448 balls p. 0.8mm
  * - 011: LBGA354  (LCI) => AB = LFBGA 16x16mm 359 balls p. 0.8mm
@@ -152,38 +132,9 @@ int stm32mp_package(void)
 	return __stm32mp_package;
 }
 
-static inline u32 read_idc(void)
-{
-	setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN);
-	return readl(IOMEM(DBGMCU_IDC));
-}
-
-/* Get Device Part Number (RPN) from OTP */
-static int get_cpu_rpn(u32 *rpn)
-{
-	int ret = bsec_read_field(BSEC_OTP_RPN, rpn);
-	if (ret)
-		return ret;
-
-	*rpn = (*rpn >> RPN_SHIFT) & RPN_MASK;
-	return 0;
-}
-
 static u32 get_cpu_revision(void)
 {
-	return (read_idc() & DBGMCU_IDC_REV_ID_MASK) >> DBGMCU_IDC_REV_ID_SHIFT;
-}
-
-static int get_cpu_type(u32 *type)
-{
-	u32 id;
-	int ret = get_cpu_rpn(type);
-	if (ret)
-		return ret;
-
-	id = (read_idc() & DBGMCU_IDC_DEV_ID_MASK) >> DBGMCU_IDC_DEV_ID_SHIFT;
-	*type |= id << 16;
-	return 0;
+	return (stm32mp_read_idc() & DBGMCU_IDC_REV_ID_MASK) >> DBGMCU_IDC_REV_ID_SHIFT;
 }
 
 static int get_cpu_package(u32 *pkg)
@@ -250,7 +201,7 @@ static int setup_cpu_type(void)
 	u32 pkg;
 	int ret;
 
-	get_cpu_type(&__stm32mp_cputype);
+	__stm32mp_get_cpu_type(&__stm32mp_cputype);
 	switch (__stm32mp_cputype) {
 	case CPU_STM32MP157Fxx:
 		cputypestr = "157F";
@@ -366,4 +317,4 @@ static int stm32mp_init(void)
 
 	return 0;
 }
-postcore_initcall(stm32mp_init);
+core_initcall(stm32mp_init);
diff --git a/arch/arm/mach-stm32mp/stm32image.c b/arch/arm/mach-stm32mp/stm32image.c
index 84975c5c3b..207df6894d 100644
--- a/arch/arm/mach-stm32mp/stm32image.c
+++ b/arch/arm/mach-stm32mp/stm32image.c
@@ -43,8 +43,6 @@ static struct image_handler image_handler_stm32_image_v1_handler = {
 
 static int stm32mp_register_stm32image_image_handler(void)
 {
-	register_image_handler(&image_handler_stm32_image_v1_handler);
-
-	return 0;
+	return register_image_handler(&image_handler_stm32_image_v1_handler);
 }
 late_initcall(stm32mp_register_stm32image_image_handler);
diff --git a/arch/arm/mach-zynq/bootm-zynqimg.c b/arch/arm/mach-zynq/bootm-zynqimg.c
index e903ab6679..77ed6880e4 100644
--- a/arch/arm/mach-zynq/bootm-zynqimg.c
+++ b/arch/arm/mach-zynq/bootm-zynqimg.c
@@ -42,8 +42,6 @@ static struct image_handler zynq_image_handler = {
 
 static int zynq_register_image_handler(void)
 {
-	register_image_handler(&zynq_image_handler);
-
-	return 0;
+	return register_image_handler(&zynq_image_handler);
 }
 late_initcall(zynq_register_image_handler);