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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2020-02-18 15:48:26 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-02-19 09:20:03 +0100 |
| commit | 07199cefe060aed82febc8a88ee8f80b37444456 (patch) | |
| tree | 33d0ef85e46030ac70fa83a765668764e988b8b4 /arch/arm | |
| parent | 2eb5ed5b57e1a60768293912be980e006e834253 (diff) | |
| download | barebox-07199cefe060aed82febc8a88ee8f80b37444456.tar.gz barebox-07199cefe060aed82febc8a88ee8f80b37444456.tar.xz | |
ARM: i.MX: external NAND boot: Leave icache disabled
It seems running from the NFC SRAM doesn't work with the instruction
cache enabled, it leads to corruptions on the i.MX27. We stumbled upon
this earlier and the solution at that time was to disable the
instruction cache in the NAND boot code. It is, however, more reliable
to just not enable the instruction cache in the first place.
This is not particularly nice as we have to ifdef this in generic code,
duplicate arm_cpu_lowlevel_init(), or call arm_cpu_lowlevel_init() later
when we are out of NFC SRAM. From the different bad solutions I chose
to ifdef the instruction cache away. It will be enabled later in the
common cache functions.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/cpu/lowlevel.S | 2 | ||||
| -rw-r--r-- | arch/arm/mach-imx/external-nand-boot.c | 9 |
2 files changed, 2 insertions, 9 deletions
diff --git a/arch/arm/cpu/lowlevel.S b/arch/arm/cpu/lowlevel.S index 3b52644e43..203a4afc47 100644 --- a/arch/arm/cpu/lowlevel.S +++ b/arch/arm/cpu/lowlevel.S @@ -57,8 +57,10 @@ THUMB( orr r12, r12, #PSR_T_BIT ) bic r12, r12, #(CR_M | CR_C | CR_B) bic r12, r12, #(CR_S | CR_R | CR_V) +#ifndef CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND /* enable instruction cache */ orr r12, r12, #CR_I +#endif #if __LINUX_ARM_ARCH__ >= 6 orr r12, r12, #CR_U diff --git a/arch/arm/mach-imx/external-nand-boot.c b/arch/arm/mach-imx/external-nand-boot.c index de8e0ffe5d..bf683de858 100644 --- a/arch/arm/mach-imx/external-nand-boot.c +++ b/arch/arm/mach-imx/external-nand-boot.c @@ -308,12 +308,6 @@ static void BARE_INIT_FUNCTION(imx35_nand_load_image)(void) static void __noreturn BARE_INIT_FUNCTION(imx##soc##_boot_nand_external_cont) \ (void *boarddata) \ { \ - uint32_t r; \ - \ - r = get_cr(); \ - r |= CR_I; \ - set_cr(r); \ - \ imx##soc##_nand_load_image(); \ \ imx##soc##_barebox_entry(boarddata); \ @@ -331,9 +325,6 @@ void __noreturn BARE_INIT_FUNCTION(imx##soc##_barebox_boot_nand_external) \ int i; \ void __noreturn (*fn)(void *); \ \ - r = get_cr(); \ - r &= ~CR_I; \ - set_cr(r); \ /* skip NAND boot if not running from NFC space */ \ r = get_pc(); \ if (r < nfc_base || r > nfc_base + 0x800) \ |