summaryrefslogtreecommitdiffstats
path: root/arch/arm
diff options
context:
space:
mode:
authorFrank Wunderlich <frank-w@public-files.de>2022-04-11 13:44:47 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2022-04-14 09:34:10 +0200
commit1e487a7626667c51310319b71db0368af9021fb3 (patch)
tree50c95ac21b532cea72ca3ef80f3bf308656537ad /arch/arm
parent4dc386944b89d3f856bf0fe8b8b9c9472f4d9ded (diff)
downloadbarebox-1e487a7626667c51310319b71db0368af9021fb3.tar.gz
barebox-1e487a7626667c51310319b71db0368af9021fb3.tar.xz
ARM: Rockchip: Update DTS for BPI-R2Pro for new HW-Rev
New Hardware revision swapped the gmacs (wan is now gmac1). Previous Revision (v00) was not in public sale so devicetree can be safely changed. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Link: https://lore.barebox.org/20220411114447.20488-1-linux@fw-web.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/dts/rk3568-bpi-r2-pro.dts28
1 files changed, 14 insertions, 14 deletions
diff --git a/arch/arm/dts/rk3568-bpi-r2-pro.dts b/arch/arm/dts/rk3568-bpi-r2-pro.dts
index ad957d23b8..db13f00cd0 100644
--- a/arch/arm/dts/rk3568-bpi-r2-pro.dts
+++ b/arch/arm/dts/rk3568-bpi-r2-pro.dts
@@ -120,20 +120,20 @@
};
};
-&gmac0 {
- assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
- assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
- assigned-clock-rates = <0>, <125000000>;
- clock_in_out = "input";
- phy-handle = <&rgmii_phy0>;
+&gmac1 {
+ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
+ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy1>;
phy-mode = "rgmii";
pinctrl-names = "default";
- pinctrl-0 = <&gmac0_miim
- &gmac0_tx_bus2
- &gmac0_rx_bus2
- &gmac0_rgmii_clk
- &gmac0_rgmii_bus>;
- snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&gmac1m1_miim
+ &gmac1m1_tx_bus2
+ &gmac1m1_rx_bus2
+ &gmac1m1_rgmii_clk
+ &gmac1m1_rgmii_bus>;
+
+ snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
@@ -367,8 +367,8 @@
status = "disabled";
};
-&mdio0 {
- rgmii_phy0: ethernet-phy@0 {
+&mdio1 {
+ rgmii_phy1: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
};