ARM: i.MX: sabresd: Add support for i.MX6QP board variant

The SabreSD comes with different SoC variants. This patch adds support
for the i.MX6QP based board. the DCD data has been taken from U-Boot
2021.04

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210415140313.29161-1-s.hauer@pengutronix.de
Link: https://lore.barebox.org/20210526064249.25378-1-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

6 files changed, 159 insertions, 3 deletions

diff --git a/arch/arm/boards/freescale-mx6-sabresd/board.c b/arch/arm/boards/freescale-mx6-sabresd/board.c
index b710c05a47..82da8bb1dd 100644
--- a/arch/arm/boards/freescale-mx6-sabresd/board.c
+++ b/arch/arm/boards/freescale-mx6-sabresd/board.c
@@ -55,7 +55,8 @@ static int ar8031_phy_fixup(struct phy_device *dev)
 
 static int sabresd_devices_init(void)
 {
-	if (!of_machine_is_compatible("fsl,imx6q-sabresd"))
+	if (!of_machine_is_compatible("fsl,imx6q-sabresd") &&
+	    !of_machine_is_compatible("fsl,imx6qp-sabresd"))
 		return 0;
 
 	armlinux_set_architecture(3980);
@@ -67,7 +68,8 @@ device_initcall(sabresd_devices_init);
 
 static int sabresd_coredevices_init(void)
 {
-	if (!of_machine_is_compatible("fsl,imx6q-sabresd"))
+	if (!of_machine_is_compatible("fsl,imx6q-sabresd") &&
+	    !of_machine_is_compatible("fsl,imx6qp-sabresd"))
 		return 0;
 
 	phy_register_fixup_for_uid(PHY_ID_AR8031, AR_PHY_ID_MASK,
diff --git a/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6-sabresd.imxcfg b/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6q-sabresd.imxcfg
index d0a0b40189..d0a0b40189 100644
--- a/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6-sabresd.imxcfg
+++ b/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6q-sabresd.imxcfg
diff --git a/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6qp-sabresd.imxcfg b/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6qp-sabresd.imxcfg
new file mode 100644
index 0000000000..aa52776afb
--- /dev/null
+++ b/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6qp-sabresd.imxcfg
@@ -0,0 +1,96 @@
+loadaddr 0x10000000
+soc imx6
+ivtofs 0x400
+wm 32 0x20e0798 0x000c0000
+wm 32 0x20e0758 0x00000000
+wm 32 0x20e0588 0x00000030
+wm 32 0x20e0594 0x00000030
+wm 32 0x20e056c 0x00000030
+wm 32 0x20e0578 0x00000030
+wm 32 0x20e074c 0x00000030
+wm 32 0x20e057c 0x00000030
+wm 32 0x20e058c 0x00000000
+wm 32 0x20e059c 0x00000030
+wm 32 0x20e05a0 0x00000030
+wm 32 0x20e078c 0x00000030
+wm 32 0x20e0750 0x00020000
+wm 32 0x20e05a8 0x00000030
+wm 32 0x20e05b0 0x00000030
+wm 32 0x20e0524 0x00000030
+wm 32 0x20e051c 0x00000030
+wm 32 0x20e0518 0x00000030
+wm 32 0x20e050c 0x00000030
+wm 32 0x20e05b8 0x00000030
+wm 32 0x20e05c0 0x00000030
+wm 32 0x20e0774 0x00020000
+wm 32 0x20e0784 0x00000030
+wm 32 0x20e0788 0x00000030
+wm 32 0x20e0794 0x00000030
+wm 32 0x20e079c 0x00000030
+wm 32 0x20e07a0 0x00000030
+wm 32 0x20e07a4 0x00000030
+wm 32 0x20e07a8 0x00000030
+wm 32 0x20e0748 0x00000030
+wm 32 0x20e05ac 0x00000030
+wm 32 0x20e05b4 0x00000030
+wm 32 0x20e0528 0x00000030
+wm 32 0x20e0520 0x00000030
+wm 32 0x20e0514 0x00000030
+wm 32 0x20e0510 0x00000030
+wm 32 0x20e05bc 0x00000030
+wm 32 0x20e05c4 0x00000030
+wm 32 0x21b0800 0xa1390003
+wm 32 0x21b080c 0x001b001e
+wm 32 0x21b0810 0x002e0029
+wm 32 0x21b480c 0x001b002a
+wm 32 0x21b4810 0x0019002c
+wm 32 0x21b083c 0x43240334
+wm 32 0x21b0840 0x0324031a
+wm 32 0x21b483c 0x43340344
+wm 32 0x21b4840 0x03280276
+wm 32 0x21b0848 0x44383A3E
+wm 32 0x21b4848 0x3C3C3846
+wm 32 0x21b0850 0x2e303230
+wm 32 0x21b4850 0x38283E34
+wm 32 0x21b081c 0x33333333
+wm 32 0x21b0820 0x33333333
+wm 32 0x21b0824 0x33333333
+wm 32 0x21b0828 0x33333333
+wm 32 0x21b481c 0x33333333
+wm 32 0x21b4820 0x33333333
+wm 32 0x21b4824 0x33333333
+wm 32 0x21b4828 0x33333333
+wm 32 0x21b08c0 0x24912249
+wm 32 0x21b48c0 0x24914289
+wm 32 0x21b08b8 0x00000800
+wm 32 0x21b48b8 0x00000800
+wm 32 0x21b0004 0x00020036
+wm 32 0x21b0008 0x24444040
+wm 32 0x21b000c 0x555A7955
+wm 32 0x21b0010 0xFF320F64
+wm 32 0x21b0014 0x01ff00db
+wm 32 0x21b0018 0x00001740
+wm 32 0x21b001c 0x00008000
+wm 32 0x21b002c 0x000026d2
+wm 32 0x21b0030 0x005A1023
+wm 32 0x21b0040 0x00000027
+wm 32 0x21b0400 0x14420000
+wm 32 0x21b0000 0x831A0000
+wm 32 0x21b0890 0x00400C58
+wm 32 0x0bb0008 0x00000000
+wm 32 0x0bb000c 0x2891E41A
+wm 32 0x0bb0038 0x00000564
+wm 32 0x0bb0014 0x00000040
+wm 32 0x0bb0028 0x00000020
+wm 32 0x0bb002c 0x00000020
+wm 32 0x21b001c 0x04088032
+wm 32 0x21b001c 0x00008033
+wm 32 0x21b001c 0x00048031
+wm 32 0x21b001c 0x09408030
+wm 32 0x21b001c 0x04008040
+wm 32 0x21b0020 0x00005800
+wm 32 0x21b0818 0x00011117
+wm 32 0x21b4818 0x00011117
+wm 32 0x21b0004 0x00025576
+wm 32 0x21b0404 0x00011006
+wm 32 0x21b001c 0x00000000
diff --git a/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c b/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c
index ae847feaa6..7f83366e7a 100644
--- a/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c
+++ b/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c
@@ -35,3 +35,19 @@ ENTRY_FUNCTION(start_imx6q_sabresd, r0, r1, r2)
 
 	barebox_arm_entry(0x10000000, SZ_1G, fdt);
 }
+
+extern char __dtb_imx6qp_sabresd_start[];
+
+ENTRY_FUNCTION(start_imx6qp_sabresd, r0, r1, r2)
+{
+	void *fdt;
+
+	imx6_cpu_lowlevel_init();
+
+	if (IS_ENABLED(CONFIG_DEBUG_LL))
+		setup_uart();
+
+	fdt = __dtb_imx6qp_sabresd_start + get_runtime_offset();
+
+	barebox_arm_entry(0x10000000, SZ_1G, fdt);
+}
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index a637869fb6..795087f41b 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -100,7 +100,7 @@ lwl-$(CONFIG_MACH_RPI2) += bcm2836-rpi-2.dtb.o
 lwl-$(CONFIG_MACH_RPI3) += bcm2837-rpi-3.dtb.o
 lwl-$(CONFIG_MACH_RPI_CM3) += bcm2837-rpi-cm3.dtb.o
 lwl-$(CONFIG_MACH_SABRELITE) += imx6q-sabrelite.dtb.o imx6dl-sabrelite.dtb.o
-lwl-$(CONFIG_MACH_SABRESD) += imx6q-sabresd.dtb.o
+lwl-$(CONFIG_MACH_SABRESD) += imx6q-sabresd.dtb.o imx6qp-sabresd.dtb.o
 lwl-$(CONFIG_MACH_FREESCALE_IMX6SX_SABRESDB) += imx6sx-sdb.dtb.o
 lwl-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK) += socfpga_cyclone5_socdk.dtb.o
 lwl-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += socfpga_cyclone5_socrates.dtb.o
diff --git a/arch/arm/dts/imx6qp-sabresd.dts b/arch/arm/dts/imx6qp-sabresd.dts
new file mode 100644
index 0000000000..1fb20cb0b4
--- /dev/null
+++ b/arch/arm/dts/imx6qp-sabresd.dts
@@ -0,0 +1,42 @@
+/*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <arm/imx6qp-sabresd.dts>
+
+/ {
+	model = "Freescale i.MX6 Quad Plus SABRE Smart Device Board";
+	compatible = "fsl,imx6qp-sabresd", "fsl,imx6qp";
+
+	chosen {
+		stdout-path = &uart1;
+
+		environment {
+			compatible = "barebox,environment";
+			device-path = &environment_usdhc3;
+		};
+	};
+};
+
+&usdhc3 {
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	partition@0 {
+		label = "barebox";
+		reg = <0x0 0xe0000>;
+	};
+
+	environment_usdhc3: partition@e0000 {
+		label = "barebox-environment";
+		reg = <0xe0000 0x20000>;
+	};
+};