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authorDaniel Schultz <d.schultz@phytec.de>2017-08-22 08:44:05 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2017-09-06 14:31:04 +0200
commit5dd0e470230d7819821bfebdec4cd8d3bb292d76 (patch)
treeb745656171553a094849bf6fafae576ed3948a49 /arch/arm
parent08e8f6ebea5c243f0a97b8c8a808b0fd7f2e1b82 (diff)
downloadbarebox-5dd0e470230d7819821bfebdec4cd8d3bb292d76.tar.gz
barebox-5dd0e470230d7819821bfebdec4cd8d3bb292d76.tar.xz
arm: dts: Enable NAND in DTS instead of DTSI
Starting with PCM-062, NAND isn't the main non-volatile memory for the AM335x. Because that, NAND has be disabled in the SOM dtsi file and will be enabled in a specific NAND SOM file. Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boards/phytec-som-am335x/lowlevel.c8
-rw-r--r--arch/arm/dts/Makefile5
-rw-r--r--arch/arm/dts/am335x-phytec-phycore-som-nand-no-eeprom.dts (renamed from arch/arm/dts/am335x-phytec-phycore-som-no-eeprom.dts)4
-rw-r--r--arch/arm/dts/am335x-phytec-phycore-som-nand-no-spi-no-eeprom.dts (renamed from arch/arm/dts/am335x-phytec-phycore-som-no-spi-no-eeprom.dts)4
-rw-r--r--arch/arm/dts/am335x-phytec-phycore-som-nand-no-spi.dts (renamed from arch/arm/dts/am335x-phytec-phycore-som.dts)2
-rw-r--r--arch/arm/dts/am335x-phytec-phycore-som-nand.dts (renamed from arch/arm/dts/am335x-phytec-phycore-som-no-spi.dts)8
-rw-r--r--arch/arm/dts/am335x-phytec-phycore-som.dtsi2
7 files changed, 25 insertions, 8 deletions
diff --git a/arch/arm/boards/phytec-som-am335x/lowlevel.c b/arch/arm/boards/phytec-som-am335x/lowlevel.c
index 03c7e98f5a..91a5473d37 100644
--- a/arch/arm/boards/phytec-som-am335x/lowlevel.c
+++ b/arch/arm/boards/phytec-som-am335x/lowlevel.c
@@ -125,10 +125,10 @@ PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_2x512mb, am335x_phytec_phycore
PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_r2_sram_512mb, am335x_phytec_phycore_som_mlo, PHYCORE_R2_MT41K256M16TW107IT_512MB);
PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_r2_sram_256mb, am335x_phytec_phycore_som_mlo, PHYCORE_R2_MT41K128M16JT_256MB);
PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_r2_sram_1024mb, am335x_phytec_phycore_som_mlo, PHYCORE_R2_MT41K512M16HA125IT_1024MB);
-PHYTEC_ENTRY(start_am33xx_phytec_phycore_sdram, am335x_phytec_phycore_som);
-PHYTEC_ENTRY(start_am33xx_phytec_phycore_no_spi_sdram, am335x_phytec_phycore_som_no_spi);
-PHYTEC_ENTRY(start_am33xx_phytec_phycore_no_eeprom_sdram, am335x_phytec_phycore_som_no_eeprom);
-PHYTEC_ENTRY(start_am33xx_phytec_phycore_no_spi_no_eeprom_sdram, am335x_phytec_phycore_som_no_spi_no_eeprom);
+PHYTEC_ENTRY(start_am33xx_phytec_phycore_nand_sdram, am335x_phytec_phycore_som_nand);
+PHYTEC_ENTRY(start_am33xx_phytec_phycore_nand_no_spi_sdram, am335x_phytec_phycore_som_nand_no_spi);
+PHYTEC_ENTRY(start_am33xx_phytec_phycore_nand_no_eeprom_sdram, am335x_phytec_phycore_som_nand_no_eeprom);
+PHYTEC_ENTRY(start_am33xx_phytec_phycore_nand_no_spi_no_eeprom_sdram, am335x_phytec_phycore_som_nand_no_spi_no_eeprom);
/* phyflex-som */
PHYTEC_ENTRY_MLO(start_am33xx_phytec_phyflex_sram_256mb, am335x_phytec_phyflex_som_mlo, PHYFLEX_MT41K128M16JT_256MB);
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 0ec03bc810..17bba3ac3c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -40,8 +40,9 @@ pbl-dtb-$(CONFIG_MACH_PCM038) += imx27-phytec-phycore-rdk.dtb.o
pbl-dtb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += am335x-phytec-phyflex-som.dtb.o am335x-phytec-phyflex-som-mlo.dtb.o \
am335x-phytec-phyflex-som-no-spi.dtb.o am335x-phytec-phyflex-som-no-eeprom.dtb.o \
am335x-phytec-phyflex-som-no-spi-no-eeprom.dtb.o \
- am335x-phytec-phycore-som.dtb.o am335x-phytec-phycore-som-no-spi.dtb.o am335x-phytec-phycore-som-mlo.dtb.o \
- am335x-phytec-phycore-som-no-eeprom.dtb.o am335x-phytec-phycore-som-no-spi-no-eeprom.dtb.o \
+ am335x-phytec-phycore-som-mlo.dtb.o \
+ am335x-phytec-phycore-som-nand.dtb.o am335x-phytec-phycore-som-nand-no-spi.dtb.o \
+ am335x-phytec-phycore-som-nand-no-eeprom.dtb.o am335x-phytec-phycore-som-nand-no-spi-no-eeprom.dtb.o \
am335x-phytec-phycard-som.dtb.o am335x-phytec-phycard-som-mlo.dtb.o
pbl-dtb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += imx6q-phytec-pbaa03.dtb.o \
imx6s-phytec-pbab01.dtb.o \
diff --git a/arch/arm/dts/am335x-phytec-phycore-som-no-eeprom.dts b/arch/arm/dts/am335x-phytec-phycore-som-nand-no-eeprom.dts
index 3dd130e2b7..9f0da372cd 100644
--- a/arch/arm/dts/am335x-phytec-phycore-som-no-eeprom.dts
+++ b/arch/arm/dts/am335x-phytec-phycore-som-nand-no-eeprom.dts
@@ -16,6 +16,10 @@
compatible = "phytec,phycore-am335x-som", "phytec,am335x-som", "ti,am33xx";
};
+&gpmc {
+ status = "okay";
+};
+
&spi0 {
status = "okay";
};
diff --git a/arch/arm/dts/am335x-phytec-phycore-som-no-spi-no-eeprom.dts b/arch/arm/dts/am335x-phytec-phycore-som-nand-no-spi-no-eeprom.dts
index 397be77076..c026a820e2 100644
--- a/arch/arm/dts/am335x-phytec-phycore-som-no-spi-no-eeprom.dts
+++ b/arch/arm/dts/am335x-phytec-phycore-som-nand-no-spi-no-eeprom.dts
@@ -15,3 +15,7 @@
model = "Phytec phyCORE AM335x";
compatible = "phytec,phycore-am335x-som", "phytec,am335x-som", "ti,am33xx";
};
+
+&gpmc {
+ status = "okay";
+};
diff --git a/arch/arm/dts/am335x-phytec-phycore-som.dts b/arch/arm/dts/am335x-phytec-phycore-som-nand-no-spi.dts
index f13e0d6bdd..2c2fab017a 100644
--- a/arch/arm/dts/am335x-phytec-phycore-som.dts
+++ b/arch/arm/dts/am335x-phytec-phycore-som-nand-no-spi.dts
@@ -15,7 +15,7 @@
compatible = "phytec,phycore-am335x-som", "phytec,am335x-som", "ti,am33xx";
};
-&spi0 {
+&gpmc {
status = "okay";
};
diff --git a/arch/arm/dts/am335x-phytec-phycore-som-no-spi.dts b/arch/arm/dts/am335x-phytec-phycore-som-nand.dts
index ad03d4dcb8..6ff2447608 100644
--- a/arch/arm/dts/am335x-phytec-phycore-som-no-spi.dts
+++ b/arch/arm/dts/am335x-phytec-phycore-som-nand.dts
@@ -15,6 +15,14 @@
compatible = "phytec,phycore-am335x-som", "phytec,am335x-som", "ti,am33xx";
};
+&gpmc {
+ status = "okay";
+};
+
+&spi0 {
+ status = "okay";
+};
+
&eeprom {
status = "okay";
};
diff --git a/arch/arm/dts/am335x-phytec-phycore-som.dtsi b/arch/arm/dts/am335x-phytec-phycore-som.dtsi
index 0025bc71a7..dbc64246e5 100644
--- a/arch/arm/dts/am335x-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/am335x-phytec-phycore-som.dtsi
@@ -249,7 +249,7 @@
};
&gpmc {
- status = "okay";
+ status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins_s0>;
ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */